Narendra Devta-Prasanna

Follow

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Enhanced logic built-in self-test module and method of online syste...
- Patent number 7,802,159
- Issue date Sep 21, 2010
- LSI Corporation
- Sreejit Chakravarty
- G01 - MEASURING TESTING
Information Patent Grant
Method for implementing test generation for systematic scan reconfi...
- Patent number 7,555,688
- Issue date Jun 30, 2009
- LSI Logic Corporation
- Ahmad A. Alvamani
- G01 - MEASURING TESTING
Information Patent Grant
Method and system for improving quality of a circuit through non-fu...
- Patent number 7,461,315
- Issue date Dec 2, 2008
- LSI Corporation
- Arun Gunda
- G01 - MEASURING TESTING
Information Patent Grant
System and method for improving transition delay fault coverage in...
- Patent number 7,461,307
- Issue date Dec 2, 2008
- LSI Corporation
- Arun Gunda
- G01 - MEASURING TESTING
Information Patent Grant
System and method for improving transition delay fault coverage in...
- Patent number 7,293,210
- Issue date Nov 6, 2007
- LSI Corporation
- Arun Gunda
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
System and method for improving transition delay fault coverage in...
- Publication number 20060253753
- Publication date Nov 9, 2006
- Arun Gunda
- G01 - MEASURING TESTING
Information Patent Application
Method and system for improving quality of a circuit through non-fu...
- Publication number 20060253751
- Publication date Nov 9, 2006
- Arun Gunda
- G01 - MEASURING TESTING
Information Patent Application
System and method for improving transition delay fault coverage in...
- Publication number 20060253754
- Publication date Nov 9, 2006
- Arun Gunda
- G01 - MEASURING TESTING
Information Patent Application
Systematic scan reconfiguration
- Publication number 20060242515
- Publication date Oct 26, 2006
- Ahmad A. Alvamani
- G01 - MEASURING TESTING