Nathan Paul Chelstrom

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Controlling asynchronous clock domains to perform synchronous opera...
- Patent number 8,144,689
- Issue date Mar 27, 2012
- International Business Machines Corporation
- Nathan P. Chelstrom
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Testing functional boundary logic at asynchronous clock boundaries...
- Patent number 7,908,536
- Issue date Mar 15, 2011
- International Business Machines Corporation
- Nathan P. Chelstrom
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for testing a ring of non-scan latches with lo...
- Patent number 7,797,600
- Issue date Sep 14, 2010
- International Business Machines Corporation
- Louis B. Bushard
- G01 - MEASURING TESTING
Information Patent Grant
Controlling asynchronous clock domains to perform synchronous opera...
- Patent number 7,792,154
- Issue date Sep 7, 2010
- International Business Machines Corporation
- Nathan P. Chelstrom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic frequency scaling sequence for multi-gigahertz microprocessors
- Patent number 7,702,944
- Issue date Apr 20, 2010
- International Business Machines Corporation
- Nathan Chelstrom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Using eFuses to store PLL configuration data
- Patent number 7,688,930
- Issue date Mar 30, 2010
- International Business Machines Corporation
- Irene Beattie
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Clock control hierarchy for integrated microprocessors and systems-...
- Patent number 7,627,771
- Issue date Dec 1, 2009
- International Business Machines Corporation
- Nathan P. Chelstrom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for using eFuses to store PLL configuration data
- Patent number 7,562,272
- Issue date Jul 14, 2009
- International Business Machines Corporation
- Irene Beattie
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Dynamic frequency scaling sequence for multi-gigahertz microprocessors
- Patent number 7,516,350
- Issue date Apr 7, 2009
- International Business Machines Corporation
- Nathan Chelstrom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for testing an integrated circuit device having elements wit...
- Patent number 7,500,164
- Issue date Mar 3, 2009
- International Business Machines Corporation
- Nathan P. Chelstrom
- G01 - MEASURING TESTING
Information Patent Grant
Method for controlling asynchronous clock domains to perform synchr...
- Patent number 7,492,793
- Issue date Feb 17, 2009
- International Business Machines Corporation
- Nathan P. Chelstrom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Systems and methods for LBIST testing using isolatable scan chains
- Patent number 7,484,153
- Issue date Jan 27, 2009
- Kabushiki Kaisha Toshiba
- Naoki Kiryu
- G01 - MEASURING TESTING
Information Patent Grant
Method for testing functional boundary logic at asynchronous clock...
- Patent number 7,478,300
- Issue date Jan 13, 2009
- International Business Machines Corporation
- Nathan P. Chelstrom
- G01 - MEASURING TESTING
Information Patent Grant
Method and apparatus for testing a ring of non-scan latches with lo...
- Patent number 7,406,640
- Issue date Jul 29, 2008
- International Business Machines Corporation
- Louis Bernard Bushard
- G01 - MEASURING TESTING
Information Patent Grant
Methods and apparatus for reducing power consumption in a processor...
- Patent number 7,233,188
- Issue date Jun 19, 2007
- Sony Computer Entertainment Inc.
- Chiaki Takano
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Dynamic Frequency Scaling Sequence for Multi-Gigahertz Microprocessors
- Publication number 20090119552
- Publication date May 7, 2009
- Nathan Chelstrom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Controlling Asynchronous Clock Domains to Perform Synchronous Opera...
- Publication number 20090106575
- Publication date Apr 23, 2009
- International Business Machines Corporation
- Nathan P. Chelstrom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Testing Functional Boundary Logic at Asynchronous Clock Boundaries...
- Publication number 20090083594
- Publication date Mar 26, 2009
- International Business Machines Corporation
- Nathan P. Chelstrom
- G01 - MEASURING TESTING
Information Patent Application
Method and Apparatus for Testing a Ring of Non-Scan Latches with Lo...
- Publication number 20080250290
- Publication date Oct 9, 2008
- International Business Machines Corporation
- Louis Bernard Bushard
- G01 - MEASURING TESTING
Information Patent Application
Using eFuses to Store PLL Configuration Data
- Publication number 20080225566
- Publication date Sep 18, 2008
- International Business Machines Corporation
- Irene Beattie
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Controlling Asynchronous Clock Domains to Perform Synchronous Opera...
- Publication number 20080229136
- Publication date Sep 18, 2008
- International Business Machines Corporation
- Nathan P. Chelstrom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR TESTING AN INTEGRATED CIRCUIT DEVICE HAVING E...
- Publication number 20070283205
- Publication date Dec 6, 2007
- Nathan P. Chelstrom
- G01 - MEASURING TESTING
Information Patent Application
SYSTEM AND METHOD FOR TESTING FUNCTIONAL BOUNDARY LOGIC AT ASYNCHRO...
- Publication number 20070266284
- Publication date Nov 15, 2007
- Nathan P. Chelstrom
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS FOR TESTING A RING OF NON-SCAN LATCHES WITH LO...
- Publication number 20070234159
- Publication date Oct 4, 2007
- LOUIS BERNARD BUSHARD
- G01 - MEASURING TESTING
Information Patent Application
Method and apparatus for processing error information and injecting...
- Publication number 20070174679
- Publication date Jul 26, 2007
- IBM Corporation
- Nathan P. Chelstrom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for LBIST testing using commonly controlled LBI...
- Publication number 20070168809
- Publication date Jul 19, 2007
- Naoki Kiryu
- G01 - MEASURING TESTING
Information Patent Application
Clock control hierarchy for integrated microprocessors and systems-...
- Publication number 20070168688
- Publication date Jul 19, 2007
- Nathan P. Chelstrom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS FOR REDUCING POWER CONSUMPTION IN A PROCESSOR...
- Publication number 20070146037
- Publication date Jun 28, 2007
- Sony Computer Entertainment Inc.
- Chiaki Takano
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Systems and methods for LBIST testing using isolatable scan chains
- Publication number 20070130489
- Publication date Jun 7, 2007
- Toshiba America Electronic Components, IBM
- Naoki Kiryu
- G01 - MEASURING TESTING
Information Patent Application
RUNN counter phase control
- Publication number 20070092048
- Publication date Apr 26, 2007
- Nathan P. Chelstrom
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Apparatus and method for controlling asynchronous clock domains to...
- Publication number 20070091933
- Publication date Apr 26, 2007
- Nathan P. Chelstrom
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for using eFuses to store PLL configuration data
- Publication number 20070081620
- Publication date Apr 12, 2007
- Irene Beattie
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Dynamic frequency scaling sequence for multi-gigahertz microprocessors
- Publication number 20060053348
- Publication date Mar 9, 2006
- International Business Machines Corporation
- Nathan Chelstrom
- G06 - COMPUTING CALCULATING COUNTING

Nathan Paul Chelstrom

Person

Patents Grantslast 30 patents

Controlling asynchronous clock domains to perform synchronous opera...

Testing functional boundary logic at asynchronous clock boundaries...

Method and apparatus for testing a ring of non-scan latches with lo...

Controlling asynchronous clock domains to perform synchronous opera...

Dynamic frequency scaling sequence for multi-gigahertz microprocessors

Using eFuses to store PLL configuration data

Clock control hierarchy for integrated microprocessors and systems-...

Apparatus and method for using eFuses to store PLL configuration data

Dynamic frequency scaling sequence for multi-gigahertz microprocessors

Method for testing an integrated circuit device having elements wit...

Method for controlling asynchronous clock domains to perform synchr...

Systems and methods for LBIST testing using isolatable scan chains

Method for testing functional boundary logic at asynchronous clock...

Method and apparatus for testing a ring of non-scan latches with lo...

Methods and apparatus for reducing power consumption in a processor...

Patents Applicationslast 30 patents

Dynamic Frequency Scaling Sequence for Multi-Gigahertz Microprocessors

Controlling Asynchronous Clock Domains to Perform Synchronous Opera...

Testing Functional Boundary Logic at Asynchronous Clock Boundaries...

Method and Apparatus for Testing a Ring of Non-Scan Latches with Lo...

Using eFuses to Store PLL Configuration Data

Controlling Asynchronous Clock Domains to Perform Synchronous Opera...

SYSTEM AND METHOD FOR TESTING AN INTEGRATED CIRCUIT DEVICE HAVING E...

SYSTEM AND METHOD FOR TESTING FUNCTIONAL BOUNDARY LOGIC AT ASYNCHRO...

METHOD AND APPARATUS FOR TESTING A RING OF NON-SCAN LATCHES WITH LO...

Method and apparatus for processing error information and injecting...

Systems and methods for LBIST testing using commonly controlled LBI...

Clock control hierarchy for integrated microprocessors and systems-...

METHODS AND APPARATUS FOR REDUCING POWER CONSUMPTION IN A PROCESSOR...

Systems and methods for LBIST testing using isolatable scan chains

RUNN counter phase control

Apparatus and method for controlling asynchronous clock domains to...

Apparatus and method for using eFuses to store PLL configuration data

Dynamic frequency scaling sequence for multi-gigahertz microprocessors