Navaz Lulla

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Fremont, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Boundary scan register for differential chip core
- Patent number 6,990,618
- Issue date Jan 24, 2006
- Cypress Semiconductor Corporation
- Navaz M. Lulla
- G01 - MEASURING TESTING
Information Patent Grant
Circuit for generating silicon ID for PLDS
- Patent number 6,922,820
- Issue date Jul 26, 2005
- Cypress Semiconductor Corp.
- Navaz Lulla
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
JTAG instruction register and decoder for PLDS
- Patent number 6,804,802
- Issue date Oct 12, 2004
- Cypress Semiconductor Corp.
- Navaz Lulla
- G01 - MEASURING TESTING
Information Patent Grant
Architecture and logic to control a device without a JTAG port thro...
- Patent number 6,757,844
- Issue date Jun 29, 2004
- Cypress Semiconductor Corp.
- Navaz Lulla
- G01 - MEASURING TESTING
Information Patent Grant
PLD configuration port architecture and logic
- Patent number 6,748,456
- Issue date Jun 8, 2004
- Cypress Semiconductor Corp.
- Richard L. Stanton
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
PLD configuration architecture
- Patent number 6,567,970
- Issue date May 20, 2003
- Cypress Semiconductor Corp.
- Anup Nayak
- G06 - COMPUTING CALCULATING COUNTING