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Navid Azizi
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Markham, CA
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Patents Grants
last 30 patents
Information
Patent Grant
Dynamic multicycles for core-periphery timing closure
Patent number
10,320,393
Issue date
Jun 11, 2019
Intel Corporation
Navid Azizi
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Low frequency variation calibration circuitry
Patent number
10,224,908
Issue date
Mar 5, 2019
Altera Corporation
Joshua David Fender
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Supporting pseudo open drain input/output standards in a programmab...
Patent number
9,948,307
Issue date
Apr 17, 2018
Altera Corporation
Navid Azizi
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Supporting pseudo open drain input/output standards in a programmab...
Patent number
9,698,795
Issue date
Jul 4, 2017
Altera Corporation
Navid Azizi
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Method and apparatus for performing timing analysis on calibrated p...
Patent number
9,684,742
Issue date
Jun 20, 2017
Altera Corporation
Navid Azizi
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Circuits and methods for DQS autogating
Patent number
9,679,633
Issue date
Jun 13, 2017
Altera Corporation
Krzysztof Maryan
G11 - INFORMATION STORAGE
Information
Patent Grant
Circuits and methods for DQS autogating
Patent number
9,257,164
Issue date
Feb 9, 2016
Altera Corporation
Krzysztof Maryan
G11 - INFORMATION STORAGE
Information
Patent Grant
Method and system for reducing the effect of component aging
Patent number
9,058,436
Issue date
Jun 16, 2015
Altera Corporation
Gordon Chiu
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Grant
Method and system for reducing the effect of component recovery
Patent number
9,047,215
Issue date
Jun 2, 2015
Altera Corporation
Gordon Chiu
H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information
Patent Grant
Timing analysis with end-of-life pessimism removal
Patent number
8,977,998
Issue date
Mar 10, 2015
Altera Corporation
Navid Azizi
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Memory interface circuitry with data strobe signal sharing capabili...
Patent number
8,897,083
Issue date
Nov 25, 2014
Altera Corporation
Navid Azizi
G11 - INFORMATION STORAGE
Information
Patent Grant
Simultaneous switching noise optimization
Patent number
8,694,946
Issue date
Apr 8, 2014
Altera Corporation
Joshua David Fender
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method and apparatus for simultaneous switching noise optimization
Patent number
8,627,254
Issue date
Jan 7, 2014
Altera Corporation
Michael Howard Kipper
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Methods for calibrating memory interface circuitry
Patent number
8,565,033
Issue date
Oct 22, 2013
Altera Corporation
Valavan Manohararajah
G11 - INFORMATION STORAGE
Information
Patent Grant
Pessimism removal in the modeling of simultaneous switching noise
Patent number
8,443,321
Issue date
May 14, 2013
Altera Corporation
Joshua David Fender
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Reducing simultaneous switching noise in an integrated circuit desi...
Patent number
8,302,058
Issue date
Oct 30, 2012
Altera Corporation
Michael Howard Kipper
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method and apparatus for simultaneous switching noise optimization
Patent number
8,296,704
Issue date
Oct 23, 2012
Altera Corporation
Michael Howard Kipper
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Circuit design with incremental simultaneous switching noise analysis
Patent number
8,151,233
Issue date
Apr 3, 2012
Altera Corporation
Navid Azizi
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Low leakage asymmetric SRAM cell devices
Patent number
7,307,905
Issue date
Dec 11, 2007
The Governing Council of the University of Toronto
Farid N. Najm
G11 - INFORMATION STORAGE
Patents Applications
last 30 patents
Information
Patent Application
DYNAMIC MULTICYCLES FOR CORE-PERIPHERY TIMING CLOSURE
Publication number
20190097636
Publication date
Mar 28, 2019
Intel Corporation
Navid Azizi
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
SUPPORTING PSEUDO OPEN DRAIN INPUT/OUTPUT STANDARDS IN A PROGRAMMAB...
Publication number
20170359073
Publication date
Dec 14, 2017
Altera Corporation
Navid Azizi
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
CIRCUITS AND METHODS FOR DQS AUTOGATING
Publication number
20170270995
Publication date
Sep 21, 2017
Altera Corporation
Krzysztof Maryan
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
CIRCUITS AND METHODS FOR DQS AUTOGATING
Publication number
20160133309
Publication date
May 12, 2016
Altera Corporation
Krzysztof Maryan
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
CIRCUITS AND METHODS FOR DQS AUTOGATING
Publication number
20140269117
Publication date
Sep 18, 2014
Krzysztof Maryan
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
METHOD AND APPARATUS FOR SIMULTANEOUS SWITCHING NOISE OPTIMIZATION
Publication number
20130080987
Publication date
Mar 28, 2013
Michael Howard Kipper
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
FPGA ARCHITECTURE WITH THRESHOLD VOLTAGE COMPENSATION AND REDUCED L...
Publication number
20080180129
Publication date
Jul 31, 2008
Actel Corporation
Georges Nabaa
H03 - BASIC ELECTRONIC CIRCUITRY
Information
Patent Application
Low leakage asymmetric sram cell devices
Publication number
20050226031
Publication date
Oct 13, 2005
Farid N. Najm
G11 - INFORMATION STORAGE