Navneet Gupta

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Ghaziabad, IN

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Patents Grantslast 30 patents

Information Patent Grant
Memory architecture and design methodology with adaptive read
- Patent number 8,737,144
- Issue date May 27, 2014
- STMicroelectronics International N.V.
- Navneet Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus having error detection in sequential logic
- Patent number 8,624,623
- Issue date Jan 7, 2014
- STMicroelectronics International N.V.
- Navneet Gupta
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Differential data sensing
- Patent number 8,456,197
- Issue date Jun 4, 2013
- STMicroelectronics International N.V.
- Prashant Dubey
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit for glitchless switching between asynchronous clocks
- Patent number 7,944,241
- Issue date May 17, 2011
- STMicroelectronics Pvt. Ltd.
- Vivek Mohan Sharma
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
APPARATUS
- Publication number 20130169360
- Publication date Jul 4, 2013
- STMICROELECTRONICS PVT. LTD.
- Navneet GUPTA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY ARCHITECTURE AND DESIGN METHODOLOGY WITH ADAPTIVE READ
- Publication number 20130170306
- Publication date Jul 4, 2013
- STMICROELECTRONICS PVT. LTD.
- Navneet GUPTA
- G11 - INFORMATION STORAGE
Information Patent Application
DIFFERENTIAL DATA SENSING
- Publication number 20120169378
- Publication date Jul 5, 2012
- STMICROELECTRONICS PVT. LTD.
- Prashant Dubey
- H04 - ELECTRIC COMMUNICATION TECHNIQUE