Nayon Tomsio

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Intelligent delay insertion based on transition
- Patent number 7,116,126
- Issue date Oct 3, 2006
- Sun Microsystems, Inc.
- Nayon Tomsio
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
On-chip power-on voltage initialization
- Patent number 7,085,176
- Issue date Aug 1, 2006
- Sun Microsystems, Inc.
- Howard L. Levy
- G11 - INFORMATION STORAGE
Information Patent Grant
Priority delay insertion circuit
- Patent number 7,016,422
- Issue date Mar 21, 2006
- Sun Microsystems, Inc.
- Harsh D. Sharma
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Power grid and bump pattern with reduced inductance and resistance
- Patent number 6,961,247
- Issue date Nov 1, 2005
- Sun Microsystems, Inc.
- Nayon Tomsio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stable and accurate CMOS level shifter
- Patent number 6,788,125
- Issue date Sep 7, 2004
- Sun Microsystems, Inc.
- Nayon Tomsio
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Resistive vias for controlling impedance and terminating I/O signal...
- Patent number 6,737,749
- Issue date May 18, 2004
- Sun Microsystems, Inc.
- Nayon Tomsio
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method and a system to distribute clock signals in digital circuits
- Patent number 6,737,902
- Issue date May 18, 2004
- Sun Microsystems, Inc.
- Nayon Tomsio
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Power grid and bump pattern with reduced inductance and resistance
- Publication number 20040001326
- Publication date Jan 1, 2004
- Nayon Tomsio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method and a system to distribute clock signals in digital circuits
- Publication number 20030214340
- Publication date Nov 20, 2003
- SUN MICROSYSTEMS, INC.
- Nayon Tomsio
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Zero-skew transition detection circuit
- Publication number 20030120982
- Publication date Jun 26, 2003
- Howard L. Levy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Resistive vias for controlling impedance and terminating I/O signal...
- Publication number 20030116856
- Publication date Jun 26, 2003
- SUN MICROSYSTEMS, INC.
- Nayon Tomsio
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Intelligent delay insertion based on transition
- Publication number 20030072332
- Publication date Apr 17, 2003
- Nayon Tomsio
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Priority delay insertion circuit
- Publication number 20030031194
- Publication date Feb 13, 2003
- Harsh D. Sharma
- H03 - BASIC ELECTRONIC CIRCUITRY

Nayon Tomsio

Person

Patents Grantslast 30 patents

Intelligent delay insertion based on transition

On-chip power-on voltage initialization

Priority delay insertion circuit

Power grid and bump pattern with reduced inductance and resistance

Stable and accurate CMOS level shifter

Resistive vias for controlling impedance and terminating I/O signal...

Method and a system to distribute clock signals in digital circuits

Patents Applicationslast 30 patents

Power grid and bump pattern with reduced inductance and resistance

Method and a system to distribute clock signals in digital circuits

Zero-skew transition detection circuit

Resistive vias for controlling impedance and terminating I/O signal...

Intelligent delay insertion based on transition

Priority delay insertion circuit