Neil McLellan

Person

Toronto, CA

People

Patents Grantslast 30 patents

Information Patent Grant
Circuit board with via trace connection and method of making the same
- Patent number 9,793,199
- Issue date Oct 17, 2017
- ATI Technologies ULC
- Andrew K W Leung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip package with undermount passive devices
- Patent number 9,607,935
- Issue date Mar 28, 2017
- ATI Technologies ULC
- Liane Martinez
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit package strip with stiffener
- Patent number 8,847,383
- Issue date Sep 30, 2014
- ATI Technologies ULC
- Neil R. McLellan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer level packaging of semiconductor chips
- Patent number 8,785,317
- Issue date Jul 22, 2014
- ATI Technologies ULC
- Neil Mclellan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a semiconductor chip with supportive terminal...
- Patent number 8,647,974
- Issue date Feb 11, 2014
- ATI Technologies ULC
- Roden R. Topacio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit board with oval micro via
- Patent number 8,445,329
- Issue date May 21, 2013
- ATI Technologies ULC
- Andrew K W Leung
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Methods of forming semiconductor chip underfill anchors
- Patent number 8,389,340
- Issue date Mar 5, 2013
- ATI Technologies ULC
- Roden R. Topacio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Wafer level packaging of semiconductor chips
- Patent number 8,344,505
- Issue date Jan 1, 2013
- ATI Technologies ULC
- Neil Mclellan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Under bump metallization for on-die capacitor
- Patent number 8,314,474
- Issue date Nov 20, 2012
- ATI Technologies ULC
- Neil McLellan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated package circuit with stiffener
- Patent number 8,120,170
- Issue date Feb 21, 2012
- ATI Technologies ULC
- Neil R. McLellan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Methods of forming semiconductor chip underfill anchors
- Patent number 8,058,108
- Issue date Nov 15, 2011
- ATI Technologies ULC
- Roden R. Topacio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip with contoured solder structure opening
- Patent number 7,994,044
- Issue date Aug 9, 2011
- ATI Technologies ULC
- Roden R. Topacio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for making semiconductor packages
- Patent number 7,985,621
- Issue date Jul 26, 2011
- ATI Technologies ULC
- Vincent K. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die stacking apparatus and method
- Patent number 7,969,020
- Issue date Jun 28, 2011
- Advanced Micro Devices, Inc.
- Vincent Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductor bump method and apparatus
- Patent number 7,906,424
- Issue date Mar 15, 2011
- Advanced Micro Devices, Inc.
- Roden R. Topacio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Die stacking apparatus and method
- Patent number 7,799,608
- Issue date Sep 21, 2010
- Advanced Micro Devices, Inc.
- Vincent Chan
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
WAFER LEVEL PACKAGING OF SEMICONDUCTOR CHIPS
- Publication number 20130095614
- Publication date Apr 18, 2013
- ATI Technologies ULC
- Neil Mclellan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR CHIP WITH SUPPORTIVE TERMINAL PAD
- Publication number 20120241985
- Publication date Sep 27, 2012
- Roden R. Topacio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED PACKAGE CIRCUIT WITH STIFFENER
- Publication number 20120127689
- Publication date May 24, 2012
- ATI Technologies ULC
- Neil R. McLellan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUIT BOARD WITH VIA TRACE CONNECTION AND METHOD OF MAKING THE SAME
- Publication number 20120120615
- Publication date May 17, 2012
- Andrew K.W. Leung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING SEMICONDUCTOR CHIP UNDERFILL ANCHORS
- Publication number 20120012987
- Publication date Jan 19, 2012
- Roden R. Topacio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHODS OF FORMING SEMICONDUCTOR CHIP UNDERFILL ANCHORS
- Publication number 20110221065
- Publication date Sep 15, 2011
- Roden R. Topacio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Circuit Board with Via Trace Connection and Method of Making the Same
- Publication number 20110147061
- Publication date Jun 23, 2011
- Andrew K.W. Leung
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTOR BUMP METHOD AND APPARATUS
- Publication number 20110133338
- Publication date Jun 9, 2011
- Roden R. Topacio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Circuit Board with Oval Micro Via
- Publication number 20110074041
- Publication date Mar 31, 2011
- Andrew KW Leung
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Semiconductor Chip with Contoured Solder Structure Opening
- Publication number 20110049725
- Publication date Mar 3, 2011
- Roden R. Topacio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
DIE STACKING APPARATUS AND METHOD
- Publication number 20100320599
- Publication date Dec 23, 2010
- Vincent Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor Chip Package with Undermount Passive Devices
- Publication number 20100265682
- Publication date Oct 21, 2010
- Liane Martinez
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Under Bump Metallization for On-Die Capacitor
- Publication number 20100019347
- Publication date Jan 28, 2010
- Neil McLellan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
WAFER LEVEL PACKAGING OF SEMICONDUCTOR CHIPS
- Publication number 20090057887
- Publication date Mar 5, 2009
- ATI Technologies ULC
- Neil Mclellan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Under Bump Routing Layer Method and Apparatus
- Publication number 20090032941
- Publication date Feb 5, 2009
- Neil McLellan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Die Stacking Apparatus and Method
- Publication number 20090032971
- Publication date Feb 5, 2009
- Vincent Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Conductor Bump Method and Apparatus
- Publication number 20090032940
- Publication date Feb 5, 2009
- Roden R. Topacio
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CIRCUIT SUBSTRATE WITH PLATED THROUGH HOLE STRUCTURE AND METHOD
- Publication number 20080245555
- Publication date Oct 9, 2008
- ATI Technologies ULC
- Yue Li
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Flip-Chip Grid Ball Array Strip and Package
- Publication number 20080197477
- Publication date Aug 21, 2008
- ATI Technologies Inc.
- Neil R. McLellan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Flip-Chip Semiconductor Package with Encapsulant Retaining Structur...
- Publication number 20080099910
- Publication date May 1, 2008
- ATI Technologies Inc.
- Neil McLellan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD AND APPARATUS FOR MAKING SEMICONDUCTOR PACKAGES
- Publication number 20080057625
- Publication date Mar 6, 2008
- ATI Technologies Inc.
- Vincent K. Chan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Flip-Chip Ball Grid Array Strip and Package
- Publication number 20080054490
- Publication date Mar 6, 2008
- ATI Technologies Inc.
- Neil R. McLellan
- H01 - BASIC ELECTRIC ELEMENTS

Neil McLellan

Person

Patents Grantslast 30 patents

Circuit board with via trace connection and method of making the same

Semiconductor chip package with undermount passive devices

Integrated circuit package strip with stiffener

Wafer level packaging of semiconductor chips

Method of fabricating a semiconductor chip with supportive terminal...

Circuit board with oval micro via

Methods of forming semiconductor chip underfill anchors

Wafer level packaging of semiconductor chips

Under bump metallization for on-die capacitor

Integrated package circuit with stiffener

Methods of forming semiconductor chip underfill anchors

Semiconductor chip with contoured solder structure opening

Method and apparatus for making semiconductor packages

Die stacking apparatus and method

Conductor bump method and apparatus

Die stacking apparatus and method

Patents Applicationslast 30 patents

WAFER LEVEL PACKAGING OF SEMICONDUCTOR CHIPS

SEMICONDUCTOR CHIP WITH SUPPORTIVE TERMINAL PAD

INTEGRATED PACKAGE CIRCUIT WITH STIFFENER

CIRCUIT BOARD WITH VIA TRACE CONNECTION AND METHOD OF MAKING THE SAME

METHODS OF FORMING SEMICONDUCTOR CHIP UNDERFILL ANCHORS

METHODS OF FORMING SEMICONDUCTOR CHIP UNDERFILL ANCHORS

Circuit Board with Via Trace Connection and Method of Making the Same

CONDUCTOR BUMP METHOD AND APPARATUS

Circuit Board with Oval Micro Via

Semiconductor Chip with Contoured Solder Structure Opening

DIE STACKING APPARATUS AND METHOD

Semiconductor Chip Package with Undermount Passive Devices

Under Bump Metallization for On-Die Capacitor

WAFER LEVEL PACKAGING OF SEMICONDUCTOR CHIPS

Under Bump Routing Layer Method and Apparatus

Die Stacking Apparatus and Method

Conductor Bump Method and Apparatus

CIRCUIT SUBSTRATE WITH PLATED THROUGH HOLE STRUCTURE AND METHOD

Flip-Chip Grid Ball Array Strip and Package

Flip-Chip Semiconductor Package with Encapsulant Retaining Structur...

METHOD AND APPARATUS FOR MAKING SEMICONDUCTOR PACKAGES

Flip-Chip Ball Grid Array Strip and Package