NELSON KEI LEUNG

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PLANO, TX, US

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Patents Grantslast 30 patents

Information Patent Grant
Testing for threshold voltage and bit cell current of non-volatile...
- Patent number 9,691,501
- Issue date Jun 27, 2017
- Texas Instruments Incorporated
- Trevor John Tarsi
- G11 - INFORMATION STORAGE
Information Patent Grant
Testing of non-volatile memory arrays
- Patent number 9,142,321
- Issue date Sep 22, 2015
- Texas Instruments Incorporated
- Trevor John Tarsi
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods for testing manufactured products
- Patent number 9,081,051
- Issue date Jul 14, 2015
- Texas Instruments Incorporated
- Amit Vijay Nahar
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
CPU BIST TESTING OF INTEGRATED CIRCUITS USING SERIAL WIRE DEBUG
- Publication number 20170045579
- Publication date Feb 16, 2017
- TEXAS INSTRUMENTS INCORPORATED
- Nelson Kei Leung
- G01 - MEASURING TESTING
Information Patent Application
TESTING OF NON-VOLATILE MEMORY ARRAYS
- Publication number 20150357046
- Publication date Dec 10, 2015
- TEXAS INSTRUMENTS INCORPORATED
- TREVOR JOHN TARSI
- G11 - INFORMATION STORAGE
Information Patent Application
TESTING OF NON-VOLATILE MEMORY ARRAYS
- Publication number 20150012787
- Publication date Jan 8, 2015
- TEXAS INSTRUMENTS INCORPORATED
- TREVOR JOHN TARSI
- G11 - INFORMATION STORAGE
Information Patent Application
Methods for Testing Manufactured Products
- Publication number 20130088253
- Publication date Apr 11, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Amit Vijay Nahar
- G01 - MEASURING TESTING