Niamh Waldron

Person

Leuven, BE

People

Patents Grantslast 30 patents

Information Patent Grant
Integration of a III-V construction on a group IV substrate
- Patent number 11,646,200
- Issue date May 9, 2023
- Imec VZW
- Liesbeth Witters
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cointegration of gallium nitride and silicon
- Patent number 11,322,390
- Issue date May 3, 2022
- Imec VZW
- Amey Mahadev Walke
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integration of a III-V device on a Si substrate
- Patent number 11,195,767
- Issue date Dec 7, 2021
- Imec VZW
- Amey Mahadev Walke
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit including at least one nano-ridge transistor
- Patent number 11,004,962
- Issue date May 11, 2021
- Imec VZW
- Robert Langer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High aspect ratio channel semiconductor device and method of manufa...
- Patent number 10,566,250
- Issue date Feb 18, 2020
- Imec VZW
- Bernardette Kunert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of transferring a semiconductor layer
- Patent number 10,340,188
- Issue date Jul 2, 2019
- Imec VZW
- Yves Mols
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
High aspect ratio channel semiconductor device and method of manufa...
- Patent number 10,224,250
- Issue date Mar 5, 2019
- Imec VZW
- Bernardette Kunert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate-all-around semiconductor device and method of fabricating the...
- Patent number 9,601,488
- Issue date Mar 21, 2017
- Imec VZW
- Niamh Waldron
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Semiconductor-on-insulator device and method of fabricating the same
- Patent number 9,355,889
- Issue date May 31, 2016
- Imec VZW
- Niamh Waldron
- C12 - BIOCHEMISTRY BEER SPIRITS WINE VINEGAR MICROBIOLOGY ENZYMOLOGY MUTATION...
Information Patent Grant
Gate-all-around semiconductor device and method of fabricating the...
- Patent number 9,324,818
- Issue date Apr 26, 2016
- Imec VZW
- Niamh Waldron
- B82 - NANO-TECHNOLOGY
Information Patent Grant
Antiphase domain boundary-free III-V compound semiconductor materia...
- Patent number 9,218,964
- Issue date Dec 22, 2015
- IMEC
- Gang Wang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for manufacturing a hybrid MOSFET device and hybrid MOSFET o...
- Patent number 8,912,055
- Issue date Dec 16, 2014
- IMEC
- Thomas Y. Hoffman
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
INTEGRATION OF A III-V CONSTRUCTION ON A GROUP IV SUBSTRATE
- Publication number 20210358748
- Publication date Nov 18, 2021
- IMEC vzw
- Liesbeth Witters
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Process for Scaling a Gate Length
- Publication number 20210151593
- Publication date May 20, 2021
- IMEC vzw
- Niamh Waldron
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
COINTEGRATION OF GALLIUM NITRIDE AND SILICON
- Publication number 20200328108
- Publication date Oct 15, 2020
- IMEC vzw
- Amey Mahadev Walke
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integration of a III-V Device on a Si Substrate
- Publication number 20200091003
- Publication date Mar 19, 2020
- IMEC vzw
- Amey Mahadev Walke
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT INCLUDING AT LEAST ONE NANO-RIDGE TRANSISTOR
- Publication number 20200075750
- Publication date Mar 5, 2020
- IMEC vzw
- Robert Langer
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH ASPECT RATIO CHANNEL SEMICONDUCTOR DEVICE AND METHOD OF MANUFA...
- Publication number 20190244862
- Publication date Aug 8, 2019
- IMEC vzw
- Bernardette Kunert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
HIGH ASPECT RATIO CHANNEL SEMICONDUCTOR DEVICE AND METHOD OF MANUFA...
- Publication number 20180082901
- Publication date Mar 22, 2018
- IMEC vzw
- Bernardette Kunert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD OF TRANSFERRING A SEMICONDUCTOR LAYER
- Publication number 20180061712
- Publication date Mar 1, 2018
- IMEC vzw
- Yves Mols
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE...
- Publication number 20160240532
- Publication date Aug 18, 2016
- IMEC vzw
- Niamh Waldron
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE...
- Publication number 20150279947
- Publication date Oct 1, 2015
- IMEC vzw
- Niamh Waldron
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SEMICONDUCTOR-ON-INSULATOR DEVICE AND METHOD OF FABRICATING THE SAME
- Publication number 20150279725
- Publication date Oct 1, 2015
- IMEC vzw
- Niamh Waldron
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD FOR MANUFACTURING TRANSISTORS AND ASSOCIATED SUBSTRATE
- Publication number 20150076620
- Publication date Mar 19, 2015
- IMEC vzw
- Niamh WALDRON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Manufacturing a Hybrid MOSFET Device and Hybrid MOSFET O...
- Publication number 20120280326
- Publication date Nov 8, 2012
- IMEC
- Thomas Y. Hoffmann
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Antiphase Domain Boundary-Free III-V Compound Semiconductor Materia...
- Publication number 20120032234
- Publication date Feb 9, 2012
- Katholieke Universiteit Leuven, K.U.Leuven R&D
- Gang Wang
- H01 - BASIC ELECTRIC ELEMENTS

Niamh Waldron

Person

Patents Grantslast 30 patents

Integration of a III-V construction on a group IV substrate

Cointegration of gallium nitride and silicon

Integration of a III-V device on a Si substrate

Integrated circuit including at least one nano-ridge transistor

High aspect ratio channel semiconductor device and method of manufa...

Method of transferring a semiconductor layer

High aspect ratio channel semiconductor device and method of manufa...

Gate-all-around semiconductor device and method of fabricating the...

Semiconductor-on-insulator device and method of fabricating the same

Gate-all-around semiconductor device and method of fabricating the...

Antiphase domain boundary-free III-V compound semiconductor materia...

Method for manufacturing a hybrid MOSFET device and hybrid MOSFET o...

Patents Applicationslast 30 patents

INTEGRATION OF A III-V CONSTRUCTION ON A GROUP IV SUBSTRATE

Process for Scaling a Gate Length

COINTEGRATION OF GALLIUM NITRIDE AND SILICON

Integration of a III-V Device on a Si Substrate

INTEGRATED CIRCUIT INCLUDING AT LEAST ONE NANO-RIDGE TRANSISTOR

HIGH ASPECT RATIO CHANNEL SEMICONDUCTOR DEVICE AND METHOD OF MANUFA...

HIGH ASPECT RATIO CHANNEL SEMICONDUCTOR DEVICE AND METHOD OF MANUFA...

METHOD OF TRANSFERRING A SEMICONDUCTOR LAYER

GATE-ALL-AROUND SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE...

GATE-ALL-AROUND SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE...

SEMICONDUCTOR-ON-INSULATOR DEVICE AND METHOD OF FABRICATING THE SAME

METHOD FOR MANUFACTURING TRANSISTORS AND ASSOCIATED SUBSTRATE

Method for Manufacturing a Hybrid MOSFET Device and Hybrid MOSFET O...

Antiphase Domain Boundary-Free III-V Compound Semiconductor Materia...