Nicholas A. Schmitz

Person

Cupertino, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Programmable optimized-distribution logic allocator for a high-dens...
- Patent number 6,753,696
- Issue date Jun 22, 2004
- Lattice Semiconductor Corporation
- Om P. Agrawal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable optimized-distribution logic allocator for a high-dens...
- Patent number 6,531,890
- Issue date Mar 11, 2003
- Lattice Semiconductor Corporation
- Om P. Agrawal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High density programmable logic device
- Patent number 5,869,981
- Issue date Feb 9, 1999
- Advanced Micro Devices, Inc.
- Om P. Agrawal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Block clock and initialization circuit for a complex high density PLD
- Patent number 5,811,987
- Issue date Sep 22, 1998
- Advanced Micro Devices, Inc.
- Benjamin Howard Ashmore
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Very high-density complex programmable logic devices with a multi-t...
- Patent number 5,521,529
- Issue date May 28, 1996
- Advanced Micro Devices, Inc.
- Om P. Agrawal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Family of multiple segmented programmable logic blocks interconnect...
- Patent number 5,225,719
- Issue date Jul 6, 1993
- Advanced Micro Devices, Inc.
- Om P. Agrawal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multiple array high performance programmable logic device family
- Patent number 5,015,884
- Issue date May 14, 1991
- Advanced Micro Devices, Inc.
- Om P. Agrawal
- H03 - BASIC ELECTRONIC CIRCUITRY

Nicholas A. Schmitz

Person

Patents Grantslast 30 patents

Programmable optimized-distribution logic allocator for a high-dens...

Programmable optimized-distribution logic allocator for a high-dens...

High density programmable logic device

Block clock and initialization circuit for a complex high density PLD

Very high-density complex programmable logic devices with a multi-t...

Family of multiple segmented programmable logic blocks interconnect...

Multiple array high performance programmable logic device family