Nicholas G. Samra

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Multi-die processor
- Patent number 8,860,199
- Issue date Oct 14, 2014
- Intel Corporation
- Bryan P. Black
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sleep state mechanism for virtual multithreading
- Patent number 8,694,976
- Issue date Apr 8, 2014
- Intel Corporation
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to monitor instruction types and control powe...
- Patent number 8,219,836
- Issue date Jul 10, 2012
- Intel Corporation
- Nicholas G. Samra
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Virtual multithreading translation mechanism including retrofit cap...
- Patent number 7,669,203
- Issue date Feb 23, 2010
- Intel Corporation
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for forming a critical update loop to continuously reload ac...
- Patent number 7,653,904
- Issue date Jan 26, 2010
- Intel Corporation
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fusing load and alu operations
- Patent number 7,398,372
- Issue date Jul 8, 2008
- Intel Corporation
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual-target block register allocation
- Patent number 7,308,563
- Issue date Dec 11, 2007
- Intel Corporation
- Nicholas Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus to control functional blocks within a processor
- Patent number 7,246,219
- Issue date Jul 17, 2007
- Intel Corporation
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Updating stack pointer based on instruction bit indicator without e...
- Patent number 7,080,236
- Issue date Jul 18, 2006
- Intel Corporation
- Stephan J. Jourdan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Intra-instruction fusion
- Patent number 7,051,190
- Issue date May 23, 2006
- Intel Corporation
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined, superscalar floating point unit having out-of-order exec...
- Patent number 6,907,518
- Issue date Jun 14, 2005
- National Semiconductor Corporation
- Jeffrey Lohman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for fast dependency coordinate matching
- Patent number 6,889,314
- Issue date May 3, 2005
- Intel Corporation
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pipelined, superscalar floating point unit having out-of-order exec...
- Patent number 6,581,155
- Issue date Jun 17, 2003
- National Semiconductor Corporation
- Jeffrey Lohman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for accelerating exchange or swap instructions...
- Patent number 6,560,671
- Issue date May 6, 2003
- Intel Corporation
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for instruction cache re-ordering
- Patent number 6,519,683
- Issue date Feb 11, 2003
- Intel Corporation
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual state rename recovery using register usage
- Patent number 6,470,435
- Issue date Oct 22, 2002
- Intel Corporation
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple-operand instruction in a two operand pipeline and processo...
- Patent number 6,412,063
- Issue date Jun 25, 2002
- VIA-Cyrix, Inc.
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for writing back multiple results over a single-r...
- Patent number 6,275,926
- Issue date Aug 14, 2001
- VIA-Cyrix, Inc.
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for processing multiple cache misses using rel...
- Patent number 5,809,530
- Issue date Sep 15, 1998
- Motorola, Inc.
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of speculatively executing store instructions prior to perfo...
- Patent number 5,765,208
- Issue date Jun 9, 1998
- Motorola, Inc.
- Jacqueline S. Nelson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Content addressable memory system
- Patent number 5,646,878
- Issue date Jul 8, 1997
- Motorola, Inc.
- Nicholas G. Samra
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for data processing system error diagnosis utiliz...
- Patent number 5,448,722
- Issue date Sep 5, 1995
- International Business Machines Corporation
- Kenton J. Lynne
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Multi-Die Processor
- Publication number 20090138688
- Publication date May 28, 2009
- Bryan P. Black
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS AND APPARATUS TO CONTROL POWER CONSUMPTION WITHIN A PROCESSOR
- Publication number 20070234094
- Publication date Oct 4, 2007
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Intra-instruction fusion
- Publication number 20060123219
- Publication date Jun 8, 2006
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Secondary register file mechanism for virtual multithreading
- Publication number 20050251662
- Publication date Nov 10, 2005
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Buffer virtualization
- Publication number 20050228971
- Publication date Oct 13, 2005
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Virtual multithreading translation mechanism including retrofit cap...
- Publication number 20050149700
- Publication date Jul 7, 2005
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Sleep state mechanism for virtual multithreading
- Publication number 20050138629
- Publication date Jun 23, 2005
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Thread switching mechanism
- Publication number 20050138333
- Publication date Jun 23, 2005
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and apparatus to control power consumption within a processor
- Publication number 20050138335
- Publication date Jun 23, 2005
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-die processor
- Publication number 20050127490
- Publication date Jun 16, 2005
- Bryan P. Black
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-threaded virtual state mechanism
- Publication number 20050097551
- Publication date May 5, 2005
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Flag value renaming
- Publication number 20050071518
- Publication date Mar 31, 2005
- Intel Corporation
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cross-thread register sharing technique
- Publication number 20040268093
- Publication date Dec 30, 2004
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Stack-pointer update technique
- Publication number 20040064681
- Publication date Apr 1, 2004
- Stephan J. Jourdan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fusing load and alu operations
- Publication number 20030236966
- Publication date Dec 25, 2003
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Intra-instruction fusion
- Publication number 20030236967
- Publication date Dec 25, 2003
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dual-target block register allocation
- Publication number 20030065910
- Publication date Apr 3, 2003
- Nicholas Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for fast dependency cooridnate matching
- Publication number 20030061466
- Publication date Mar 27, 2003
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Virtual r0 register
- Publication number 20020124158
- Publication date Sep 5, 2002
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dual state rename recovery using register usage
- Publication number 20020087837
- Publication date Jul 4, 2002
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for instruction cache re-ordering
- Publication number 20020087793
- Publication date Jul 4, 2002
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instruction packetization based on rename capacity
- Publication number 20020087831
- Publication date Jul 4, 2002
- Nicholas G. Samra
- G06 - COMPUTING CALCULATING COUNTING

Nicholas G. Samra

Person

Patents Grantslast 30 patents

Multi-die processor

Sleep state mechanism for virtual multithreading

Methods and apparatus to monitor instruction types and control powe...

Virtual multithreading translation mechanism including retrofit cap...

System for forming a critical update loop to continuously reload ac...

Fusing load and alu operations

Dual-target block register allocation

Methods and apparatus to control functional blocks within a processor

Updating stack pointer based on instruction bit indicator without e...

Intra-instruction fusion

Pipelined, superscalar floating point unit having out-of-order exec...

Method and apparatus for fast dependency coordinate matching

Pipelined, superscalar floating point unit having out-of-order exec...

Method and apparatus for accelerating exchange or swap instructions...

System and method for instruction cache re-ordering

Dual state rename recovery using register usage

Multiple-operand instruction in a two operand pipeline and processo...

System and method for writing back multiple results over a single-r...

Method and apparatus for processing multiple cache misses using rel...

Method of speculatively executing store instructions prior to perfo...

Content addressable memory system

Method and system for data processing system error diagnosis utiliz...

Patents Applicationslast 30 patents

Multi-Die Processor

METHODS AND APPARATUS TO CONTROL POWER CONSUMPTION WITHIN A PROCESSOR

Intra-instruction fusion

Secondary register file mechanism for virtual multithreading

Buffer virtualization

Virtual multithreading translation mechanism including retrofit cap...

Sleep state mechanism for virtual multithreading

Thread switching mechanism

Methods and apparatus to control power consumption within a processor

Multi-die processor

Multi-threaded virtual state mechanism

Flag value renaming

Cross-thread register sharing technique

Stack-pointer update technique

Fusing load and alu operations

Intra-instruction fusion

Dual-target block register allocation

Method and apparatus for fast dependency cooridnate matching

Virtual r0 register

Dual state rename recovery using register usage

System and method for instruction cache re-ordering

Instruction packetization based on rename capacity