Nicholas VanHeel

Person

Madison, CT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Testing fuse configurations in semiconductor devices
- Patent number 11,009,548
- Issue date May 18, 2021
- RAMBUS INC.
- Adrian E. Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Testing fuse configurations in semiconductor devices
- Patent number 8,063,650
- Issue date Nov 22, 2011
- Rambus Inc.
- Adrian E. Ong
- G01 - MEASURING TESTING
Information Patent Grant
Intrinsic dual gate oxide MOSFET using a damascene gate process
- Patent number 7,276,775
- Issue date Oct 2, 2007
- International Business Machines Corporation
- Claude Louis Bertin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Compression circuit for testing a memory device
- Patent number 7,137,050
- Issue date Nov 14, 2006
- Micron Technology, Inc.
- Todd A. Merritt
- G11 - INFORMATION STORAGE
Information Patent Grant
Fuse latch circuit with non-disruptive re-interrogation
- Patent number 6,972,613
- Issue date Dec 6, 2005
- Infineon Technologies AG
- Michael A. Killian
- G11 - INFORMATION STORAGE
Information Patent Grant
System for testing integrated circuit devices
- Patent number 6,930,503
- Issue date Aug 16, 2005
- Micron Technology, Inc.
- Joseph C. Sher
- G11 - INFORMATION STORAGE
Information Patent Grant
System for testing integrated circuit devices
- Patent number 6,756,805
- Issue date Jun 29, 2004
- Micron Technology, Inc.
- Joseph C. Sher
- G11 - INFORMATION STORAGE
Information Patent Grant
Compression circuit for testing a memory device
- Patent number 6,735,729
- Issue date May 11, 2004
- Micron Technology, Inc.
- Todd A. Merritt
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for improving DRAM single cell fail fixability an...
- Patent number 6,570,806
- Issue date May 27, 2003
- International Business Machines Corporation
- Claude Louis Bertin
- G11 - INFORMATION STORAGE
Information Patent Grant
Intrinsic dual gate oxide MOSFET using a damascene gate process
- Patent number 6,531,410
- Issue date Mar 11, 2003
- International Business Machines Corporation
- Claude Louis Bertin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Inductive voltage spike generator with diode shunt
- Patent number 6,452,439
- Issue date Sep 17, 2002
- International Business Machines Corporation
- John A. Fifield
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Voltage independent fuse circuit and method
- Patent number 6,449,207
- Issue date Sep 10, 2002
- Micron Technology, Inc.
- Joseph C. Sher
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable latch device with integrated programmable element
- Patent number 6,420,925
- Issue date Jul 16, 2002
- International Business Machines Corporation
- John A. Fifield
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable delay element and synchronous DRAM using the same
- Patent number 6,400,202
- Issue date Jun 4, 2002
- International Business Machines Corporation
- John A. Fifield
- G11 - INFORMATION STORAGE
Information Patent Grant
Antifuse latch device with controlled current programming and varia...
- Patent number 6,384,666
- Issue date May 7, 2002
- International Business Machines Corporation
- Claude L. Bertin
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated fuse latch and shift register for efficient programming...
- Patent number 6,373,771
- Issue date Apr 16, 2002
- International Business Machines Corporation
- John A. Fifield
- G11 - INFORMATION STORAGE
Information Patent Grant
Programmable delay element and synchronous DRAM using the same
- Patent number 6,348,827
- Issue date Feb 19, 2002
- International Business Machines Corporation
- John A. Fifield
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus for blowing and sensing antifuses
- Patent number 6,346,846
- Issue date Feb 12, 2002
- International Business Machines Corporation
- Claude L. Bertin
- G11 - INFORMATION STORAGE
Information Patent Grant
Decode scheme for programming antifuses arranged in banks
- Patent number 6,339,559
- Issue date Jan 15, 2002
- International Business Machines Corporation
- Claude Louis Bertin
- G11 - INFORMATION STORAGE
Information Patent Grant
Partially non-volatile dynamic random access memory formed by a plu...
- Patent number 6,266,272
- Issue date Jul 24, 2001
- International Business Machines Corporation
- Toshiaki Kirihata
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage independent fuse circuit and method
- Patent number 6,266,291
- Issue date Jul 24, 2001
- Micron Technology, Inc.
- Joseph C. Sher
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
TESTING FUSE CONFIGURATIONS IN SEMICONDUCTOR DEVICES
- Publication number 20190353707
- Publication date Nov 21, 2019
- RAMBUS INC.
- Adrian E. Ong
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System for testing integrated circuit devices
- Publication number 20050270058
- Publication date Dec 8, 2005
- Micron Technology, Inc.
- Joseph C. Sher
- G01 - MEASURING TESTING
Information Patent Application
Fuse latch circuit with non-disruptive re-interrogation
- Publication number 20050052218
- Publication date Mar 10, 2005
- Infineon Technologies North America Corp.
- Michael A. Killian
- G11 - INFORMATION STORAGE
Information Patent Application
Compression circuit for testing a momory device
- Publication number 20040133828
- Publication date Jul 8, 2004
- Micron Technology, Inc.
- Todd A. Merritt
- G11 - INFORMATION STORAGE
Information Patent Application
Intrinsic dual gate oxide mosfet using a damascene gate process
- Publication number 20030109090
- Publication date Jun 12, 2003
- International Business Machines Corporation
- Claude Louis Bertin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System and method for improving dram single cell fail fixability an...
- Publication number 20020196693
- Publication date Dec 26, 2002
- International Business Machines Corporation
- Claude Louis Bertin
- G11 - INFORMATION STORAGE
Information Patent Application
PROGRAMMABLE LATCH DEVICE WITH INTEGRATED PROGRAMMABLE ELEMENT
- Publication number 20020089363
- Publication date Jul 11, 2002
- International Business Machines Corporation, Armonk, NY 10504
- John A. Fifield
- G11 - INFORMATION STORAGE
Information Patent Application
Programmable delay element and synchronous dram using the same
- Publication number 20020030524
- Publication date Mar 14, 2002
- John A. Fifield
- G11 - INFORMATION STORAGE
Information Patent Application
Voltage independent fuse circuit and method
- Publication number 20010046170
- Publication date Nov 29, 2001
- Joseph C. Sher
- G11 - INFORMATION STORAGE

Nicholas VanHeel

Person

Patents Grantslast 30 patents

Testing fuse configurations in semiconductor devices

Testing fuse configurations in semiconductor devices

Intrinsic dual gate oxide MOSFET using a damascene gate process

Compression circuit for testing a memory device

Fuse latch circuit with non-disruptive re-interrogation

System for testing integrated circuit devices

System for testing integrated circuit devices

Compression circuit for testing a memory device

System and method for improving DRAM single cell fail fixability an...

Intrinsic dual gate oxide MOSFET using a damascene gate process

Inductive voltage spike generator with diode shunt

Voltage independent fuse circuit and method

Programmable latch device with integrated programmable element

Programmable delay element and synchronous DRAM using the same

Antifuse latch device with controlled current programming and varia...

Integrated fuse latch and shift register for efficient programming...

Programmable delay element and synchronous DRAM using the same

Methods and apparatus for blowing and sensing antifuses

Decode scheme for programming antifuses arranged in banks

Partially non-volatile dynamic random access memory formed by a plu...

Voltage independent fuse circuit and method

Patents Applicationslast 30 patents

TESTING FUSE CONFIGURATIONS IN SEMICONDUCTOR DEVICES

System for testing integrated circuit devices

Fuse latch circuit with non-disruptive re-interrogation

Compression circuit for testing a momory device

Intrinsic dual gate oxide mosfet using a damascene gate process

System and method for improving dram single cell fail fixability an...

PROGRAMMABLE LATCH DEVICE WITH INTEGRATED PROGRAMMABLE ELEMENT

Programmable delay element and synchronous dram using the same

Voltage independent fuse circuit and method