Nidhir Kumar

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Method for cycle accurate data transfer in a skewed synchronous clo...
- Patent number 10,775,836
- Issue date Sep 15, 2020
- Synopsys, Inc.
- Gyan Prakash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for calibrating the read latency of a DDR DRAM module
- Patent number 10,725,681
- Issue date Jul 28, 2020
- Synopsys, Inc.
- Gyan Prakash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for controlling phase alignment of clock signals
- Patent number 10,504,569
- Issue date Dec 10, 2019
- INVECAS TECHNOLOGIES PVT. LTD
- Gyan Prakash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous clock gating circuit
- Patent number 10,312,886
- Issue date Jun 4, 2019
- INVECAS TECHNOLOGIES PVT. LTD
- Gyan Prakash
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
System and method for multi-cycle write leveling
- Patent number 10,297,310
- Issue date May 21, 2019
- INVECAS TECHNOLOGIES PVT. LTD
- Gyan Prakash
- G11 - INFORMATION STORAGE
Information Patent Grant
Interface for controlling the phase alignment of clock signals for...
- Patent number 9,213,359
- Issue date Dec 15, 2015
- ARM Limited
- Gyan Prakash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory controller using a data strobe signal and method of calibrat...
- Patent number 9,105,327
- Issue date Aug 11, 2015
- ARM Limited
- Gyan Prakash
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory controller and method of calibrating a memory controller
- Patent number 9,042,188
- Issue date May 26, 2015
- ARM Limited
- Gyan Prakash
- G11 - INFORMATION STORAGE
Information Patent Grant
Data signal receiver and method of calibrating a data signal receiver
- Patent number 9,007,855
- Issue date Apr 14, 2015
- ARM Limited
- Nidhir Kumar
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for aligning a clock signal and a data strobe...
- Patent number 8,780,655
- Issue date Jul 15, 2014
- ARM Limited
- Nidhir Kumar
- G11 - INFORMATION STORAGE
Information Patent Grant
Calibration of delay chains
- Patent number 8,773,185
- Issue date Jul 8, 2014
- ARM Limited
- Sivaramakrishnan Subramanian
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Receiver circuit with high input voltage protection
- Patent number 8,502,568
- Issue date Aug 6, 2013
- ARM Limited
- Sandeep Dwivedi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reduced quantization error I/O resistor calibrator
- Patent number 8,427,198
- Issue date Apr 23, 2013
- ARM Limited
- Sridhar Cheruku
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus and method providing an interface between a first voltage...
- Patent number 8,421,516
- Issue date Apr 16, 2013
- ARM Limited
- Nidhir Kumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Distributing power to an integrated circuit
- Patent number 7,986,504
- Issue date Jul 26, 2011
- ARM Limited
- Mikael Rien
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Low voltage differential signalling driver
- Patent number 7,924,056
- Issue date Apr 12, 2011
- ARM Limited
- Nidhir Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
SIGNAL RETIMING WITHIN MEMORY SYSTEMS
- Publication number 20240363153
- Publication date Oct 31, 2024
- Micron Technology, Inc.
- Gyan Prakash
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR CONTROLLING PHASE ALLIGNMENT OF CLOCK SIGNALS
- Publication number 20190066740
- Publication date Feb 28, 2019
- INVECAS TECHNOLOGIES PVT. LTD.
- GYAN PRAKASH
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD FOR CYCLE ACCURATE DATA TRANSFER IN A SKEWED SYNCHRONOUS CLO...
- Publication number 20190004564
- Publication date Jan 3, 2019
- GYAN PRAKASH
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
A METHOD FOR CALIBRATING THE READ LATENCY OF A DDR DRAM MODULE
- Publication number 20180357002
- Publication date Dec 13, 2018
- INVECAS TECHNOLOGIES PVT. LTD
- GYAN PRAKASH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ASYNCHRONOUS CLOCK GATING CIRCUIT
- Publication number 20180351537
- Publication date Dec 6, 2018
- INVECAS TECHNOLOGIES PVT. LTD
- GYAN PRAKASH
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
A SYSTEM AND METHOD FOR MULTI-CYCLE WRITE LEVELING
- Publication number 20180075898
- Publication date Mar 15, 2018
- INVECAS TECHNOLOGIES PVT. LTD
- GYAN PRAKASH
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY CONTROLLER USING A DATA STROBE SIGNAL AND METHOD OF CALIBRAT...
- Publication number 20140307514
- Publication date Oct 16, 2014
- ARM Limited
- Gyan PRAKASH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY CONTROLLER AND METHOD OF CALIBRATING A MEMORY CONTROLLER
- Publication number 20140293718
- Publication date Oct 2, 2014
- ARM Limited
- Gyan Prakash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA SIGNAL RECEIVER AND METHOD OF CALIBRATING A DATA SIGNAL RECEIVER
- Publication number 20140177377
- Publication date Jun 26, 2014
- ARM Limited
- Nidhir KUMAR
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR ALIGNING A CLOCK SIGNAL AND A DATA STROBE...
- Publication number 20140177359
- Publication date Jun 26, 2014
- ARM Limited
- Nidhir KUMAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERFACE FOR CONTROLLING THE PHASE ALIGNMENT OF CLOCK SIGNALS FOR...
- Publication number 20140181568
- Publication date Jun 26, 2014
- ARM Limited
- Gyan Prakash
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CALIBRATION OF DELAY CHAINS
- Publication number 20140139277
- Publication date May 22, 2014
- ARM Limited
- Sivaramakrishnan SUBRAMANIAN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
DUTY CYCLE CORRECTION WITHIN AN INTEGRATED CIRCUIT
- Publication number 20140002156
- Publication date Jan 2, 2014
- ARM Limited
- Sandeep Dwivedi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Receiver circuit with high input voltage protection
- Publication number 20120044608
- Publication date Feb 23, 2012
- ARM Limited
- Sandeep Dwivedi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Apparatus and method providing an interface between a first voltage...
- Publication number 20110095804
- Publication date Apr 28, 2011
- ARM Limited
- Nidhir Kumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Distributing power to an integrated circuit
- Publication number 20100244564
- Publication date Sep 30, 2010
- ARM Limited
- Mikael Rien
- Y10 - TECHNICAL SUBJECTS COVERED BY FORMER USPC
Information Patent Application
Low voltage differential signalling driver
- Publication number 20100231268
- Publication date Sep 16, 2010
- ARM Limited
- Nidhir Kumar
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Nidhir Kumar

Person

Patents Grantslast 30 patents

Method for cycle accurate data transfer in a skewed synchronous clo...

Method for calibrating the read latency of a DDR DRAM module

System and method for controlling phase alignment of clock signals

Asynchronous clock gating circuit

System and method for multi-cycle write leveling

Interface for controlling the phase alignment of clock signals for...

Memory controller using a data strobe signal and method of calibrat...

Memory controller and method of calibrating a memory controller

Data signal receiver and method of calibrating a data signal receiver

Method and apparatus for aligning a clock signal and a data strobe...

Calibration of delay chains

Receiver circuit with high input voltage protection

Reduced quantization error I/O resistor calibrator

Apparatus and method providing an interface between a first voltage...

Distributing power to an integrated circuit

Low voltage differential signalling driver

Patents Applicationslast 30 patents

SIGNAL RETIMING WITHIN MEMORY SYSTEMS

SYSTEM AND METHOD FOR CONTROLLING PHASE ALLIGNMENT OF CLOCK SIGNALS

METHOD FOR CYCLE ACCURATE DATA TRANSFER IN A SKEWED SYNCHRONOUS CLO...

A METHOD FOR CALIBRATING THE READ LATENCY OF A DDR DRAM MODULE

ASYNCHRONOUS CLOCK GATING CIRCUIT

A SYSTEM AND METHOD FOR MULTI-CYCLE WRITE LEVELING

MEMORY CONTROLLER USING A DATA STROBE SIGNAL AND METHOD OF CALIBRAT...

MEMORY CONTROLLER AND METHOD OF CALIBRATING A MEMORY CONTROLLER

DATA SIGNAL RECEIVER AND METHOD OF CALIBRATING A DATA SIGNAL RECEIVER

METHOD AND APPARATUS FOR ALIGNING A CLOCK SIGNAL AND A DATA STROBE...

INTERFACE FOR CONTROLLING THE PHASE ALIGNMENT OF CLOCK SIGNALS FOR...

CALIBRATION OF DELAY CHAINS

DUTY CYCLE CORRECTION WITHIN AN INTEGRATED CIRCUIT

Receiver circuit with high input voltage protection

Apparatus and method providing an interface between a first voltage...

Distributing power to an integrated circuit

Low voltage differential signalling driver