Nikhil JAIN

Person

Albany, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
Secure identification of wafer and chip
- Patent number 11,947,712
- Issue date Apr 2, 2024
- International Business Machines Corporation
- Richard C. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Wafer backside engineering for wafer stress control
- Patent number 11,569,134
- Issue date Jan 31, 2023
- International Business Machines Corporation
- Nikhil Jain
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY

Patents Applicationslast 30 patents

Information Patent Application
Hybrid Power Rail Formation in Dielectric Isolation for Semiconduct...
- Publication number 20240234317
- Publication date Jul 11, 2024
- International Business Machines Corporation
- Nikhil Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Hybrid Power Rail Formation in Dielectric Isolation for Semiconduct...
- Publication number 20240136288
- Publication date Apr 25, 2024
- International Business Machines Corporation
- Nikhil Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTORS WITH VIA-TO-BACKSIDE POWER RAIL SPACERS
- Publication number 20240105554
- Publication date Mar 28, 2024
- International Business Machines Corporation
- Tao Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACKSIDE CONTACT WITH FULL WRAP-AROUND CONTACT
- Publication number 20240088233
- Publication date Mar 14, 2024
- International Business Machines Corporation
- Prabudhya Roy Chowdhury
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PIXELATED CHUCK FOR RETAINING WARPED SEMICONDUCTOR WAFERS
- Publication number 20240087939
- Publication date Mar 14, 2024
- International Business Machines Corporation
- VINAY PAI
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED DEVICE VIA TO POWER ELEMENT STRUCTURE
- Publication number 20240072146
- Publication date Feb 29, 2024
- International Business Machines Corporation
- Liqiao Qin
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERLEVEL VIA FOR STACKED FIELD-EFFECT TRANSISTOR DEVICE
- Publication number 20230369218
- Publication date Nov 16, 2023
- International Business Machines Corporation
- Tao Li
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VIA TO BACKSIDE POWER RAIL THROUGH ACTIVE REGION
- Publication number 20230369220
- Publication date Nov 16, 2023
- International Business Machines Corporation
- Sagarika Mukesh
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SELF-ALIGNED BACKSIDE CONTACT INTEGRATION FOR TRANSISTORS
- Publication number 20230268389
- Publication date Aug 24, 2023
- International Business Machines Corporation
- Nikhil Jain
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SECURE IDENTIFICATION OF WAFER AND CHIP
- Publication number 20230094707
- Publication date Mar 30, 2023
- International Business Machines Corporation
- Richard C. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTACT TRACING UTILZING DEVICE SIGNATURES CAPTURED DURING TRANSACT...
- Publication number 20220415523
- Publication date Dec 29, 2022
- International Business Machines Corporation
- Richard C. Johnson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WAFER BACKSIDE ENGINEERING FOR WAFER STRESS CONTROL
- Publication number 20210320036
- Publication date Oct 14, 2021
- International Business Machines Corporation
- Nikhil JAIN
- H01 - BASIC ELECTRIC ELEMENTS

Nikhil JAIN

Person

Patents Grantslast 30 patents

Secure identification of wafer and chip

Wafer backside engineering for wafer stress control

Patents Applicationslast 30 patents

Hybrid Power Rail Formation in Dielectric Isolation for Semiconduct...

Hybrid Power Rail Formation in Dielectric Isolation for Semiconduct...

TRANSISTORS WITH VIA-TO-BACKSIDE POWER RAIL SPACERS

BACKSIDE CONTACT WITH FULL WRAP-AROUND CONTACT

PIXELATED CHUCK FOR RETAINING WARPED SEMICONDUCTOR WAFERS

STACKED DEVICE VIA TO POWER ELEMENT STRUCTURE

INTERLEVEL VIA FOR STACKED FIELD-EFFECT TRANSISTOR DEVICE

VIA TO BACKSIDE POWER RAIL THROUGH ACTIVE REGION

SELF-ALIGNED BACKSIDE CONTACT INTEGRATION FOR TRANSISTORS

SECURE IDENTIFICATION OF WAFER AND CHIP

CONTACT TRACING UTILZING DEVICE SIGNATURES CAPTURED DURING TRANSACT...

WAFER BACKSIDE ENGINEERING FOR WAFER STRESS CONTROL