Nilanjan Chatterjee

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Cupertino, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Partition based design implementation for programmable logic devices
- Patent number 9,449,133
- Issue date Sep 20, 2016
- LATTICE SEMICONDUCTOR CORPORATION
- Hua Xue
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Logic absorption techniques for programmable logic devices
- Patent number 9,390,210
- Issue date Jul 12, 2016
- LATTICE SEMICONDUCTOR CORPORATION
- Nilanjan Chatterjee
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
LOGIC ABSORPTION TECHNIQUES FOR PROGRAMMABLE LOGIC DEVICES
- Publication number 20150347642
- Publication date Dec 3, 2015
- Lattice Semiconductor Corporation
- Nilanjan Chatterjee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARTITION BASED DESIGN IMPLEMENTATION FOR PROGRAMMABLE LOGIC DEVICES
- Publication number 20150324509
- Publication date Nov 12, 2015
- Lattice Semiconductor Corporation
- Hua Xue
- G06 - COMPUTING CALCULATING COUNTING