Nilesh Acharya

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Mumbai, IN

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Patents Grantslast 30 patents

Information Patent Grant
Method and system for integrated pipeline write hazard handling usi...
- Patent number 8,205,057
- Issue date Jun 19, 2012
- Texas Instruments Incorporated
- Robert Nychka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance multilevel cache hierarchy
- Patent number 7,809,889
- Issue date Oct 5, 2010
- Texas Instruments Incorporated
- Robert Nychka
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Integrated Pipeline Write Hazard Handling Using Memory Attributes
- Publication number 20100332757
- Publication date Dec 30, 2010
- TEXAS INSTRUMENTS INCORPORATED
- Robert Nychka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High Performance Multilevel Cache Hierarchy
- Publication number 20090024796
- Publication date Jan 22, 2009
- Robert Nychka
- G06 - COMPUTING CALCULATING COUNTING