NIR MISGAV

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Netania, IL

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Patents Grantslast 30 patents

Information Patent Grant
Memory controller for multi-level system memory with coherency unit
- Patent number 10,204,047
- Issue date Feb 12, 2019
- Intel Corporation
- Israel Diamand
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing sectored cache
- Patent number 9,767,041
- Issue date Sep 19, 2017
- Intel Corporation
- Aravindh V. Anantaraman
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
VOLTAGE COMPENSATION FOR REDUCED POWER STATES
- Publication number 20250004490
- Publication date Jan 2, 2025
- Intel Corporation
- Yoni AIZIK
- G05 - CONTROLLING REGULATING
Information Patent Application
MULTI-CORE PROCESSOR FREQUENCY LIMIT DETERMINATION
- Publication number 20240231465
- Publication date Jul 11, 2024
- Intel Corporation
- Yoav Babajani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-CORE PROCESSOR FREQUENCY LIMIT DETERMINATION
- Publication number 20240134440
- Publication date Apr 25, 2024
- Intel Corporation
- Yoav Babajani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MANAGING SECTORED CACHE
- Publication number 20160350237
- Publication date Dec 1, 2016
- Intel Corporation
- Aravindh V. Anantaraman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Controller For Multi-Level System Memory With Coherency Unit
- Publication number 20160283389
- Publication date Sep 29, 2016
- ISRAEL DIAMAND
- G06 - COMPUTING CALCULATING COUNTING