Niranjan K. Soundararajan

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Segmented branch target buffer based on branch instruction type
- Patent number 12,190,114
- Issue date Jan 7, 2025
- Intel Corporation
- Niranjan Kumar Soundararajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Alternate path decode for hard-to-predict branch
- Patent number 12,153,925
- Issue date Nov 26, 2024
- Intel Corporation
- Niranjan Soundararajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for hardware-based memoization of function cal...
- Patent number 12,020,033
- Issue date Jun 25, 2024
- Intel Corporation
- Niranjan Kumar Soundararajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch prefetch mechanisms for mitigating frontend branch resteers
- Patent number 11,928,472
- Issue date Mar 12, 2024
- Intel Corporation
- Gilles Pokam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction set architecture based and automatic load tracking for...
- Patent number 11,321,089
- Issue date May 3, 2022
- Intel Corporation
- Saurabh Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for controlling allocations into a bra...
- Patent number 10,642,621
- Issue date May 5, 2020
- Intel Corporation
- Ragavendra Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Misprediction-triggered local history-based branch prediction
- Patent number 10,579,414
- Issue date Mar 3, 2020
- Intel Corporation
- Niranjan K. Soundararajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch predictor with empirical branch bias override
- Patent number 10,423,422
- Issue date Sep 24, 2019
- Intel Corporation
- Niranjan K. Soundararajan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DEVICE, METHOD AND SYSTEM TO CAPTURE OR RESTORE MICROARCHITECTURAL...
- Publication number 20240202000
- Publication date Jun 20, 2024
- Intel Corporation
- Niranjan Soundararajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION ELIMINATION THROUGH HARDWARE DRIVEN MEMOIZATION OF LOOP...
- Publication number 20240103874
- Publication date Mar 28, 2024
- Intel Corporation
- Niranjan Kumar Soundararajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SELECTIVE PROVISIONING OF SUPPLEMENTARY MICRO-OPERATION CACHE RESOU...
- Publication number 20230418757
- Publication date Dec 28, 2023
- Intel Corporation
- Niranjan Soundararajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Throttling Code Fetch For Speculative Code Paths
- Publication number 20230195464
- Publication date Jun 22, 2023
- Intel Corporation
- Anant Vithal Nori
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DE-PRIORITIZING SPECULATIVE CODE LINES IN ON-CHIP CACHES
- Publication number 20230185718
- Publication date Jun 15, 2023
- Intel Corporation
- Anant Vithal Nori
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PREDICTION OF NEXT TAKEN BRANCHES IN A PROCESSOR
- Publication number 20230100693
- Publication date Mar 30, 2023
- Intel Corporation
- Saurabh Gupta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHING BASED ON BRANCH INSTRUCTIONS IN A PROCESSOR
- Publication number 20230103206
- Publication date Mar 30, 2023
- Intel Corporation
- Niranjan Soundararajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR HARDWARE-BASED MEMOIZATION OF FUNCTION CAL...
- Publication number 20220206816
- Publication date Jun 30, 2022
- Intel Corporation
- Niranjan Kumar Soundararajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Accessing A Branch Target Buffer Based On Branch Instruction Inform...
- Publication number 20220197662
- Publication date Jun 23, 2022
- NIRANJAN KUMAR SOUNDARARAJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALTERNATE PATH DECODE FOR HARD-TO-PREDICT BRANCH
- Publication number 20220197650
- Publication date Jun 23, 2022
- Intel Corporation
- Niranjan Soundararajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEGMENTED BRANCH TARGET BUFFER BASED ON BRANCH INSTRUCTION TYPE
- Publication number 20220197657
- Publication date Jun 23, 2022
- Intel Corporation
- NIRANJAN KUMAR SOUNDARARAJAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BRANCH PREFETCH MECHANISMS FOR MITIGATING FRONTEND BRANCH RESTEERS
- Publication number 20220100520
- Publication date Mar 31, 2022
- Intel Corporation
- Gilles Pokam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION SET ARCHITECTURE BASED AND AUTOMATIC LOAD TRACKING FOR...
- Publication number 20210326139
- Publication date Oct 21, 2021
- SAURABH GUPTA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Controlling Allocations Into A Bra...
- Publication number 20190205143
- Publication date Jul 4, 2019
- Intel Corporation
- Ragavendra Natarajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR BRANCH PREDICTION UTILIZING PRIMARY AND SE...
- Publication number 20180349144
- Publication date Dec 6, 2018
- Intel Corporation
- Rahul Pal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MISPREDICTION-TRIGGERED LOCAL HISTORY-BASED BRANCH PREDICTION
- Publication number 20180285115
- Publication date Oct 4, 2018
- Intel Corporation
- Niranjan K. Soundararajan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Branch Predictor with Empirical Branch Bias Override
- Publication number 20180173533
- Publication date Jun 21, 2018
- Intel Corporation
- Niranjan K. Soundararajan
- G06 - COMPUTING CALCULATING COUNTING

Niranjan K. Soundararajan

Person

Patents Grantslast 30 patents

Segmented branch target buffer based on branch instruction type

Alternate path decode for hard-to-predict branch

Apparatus and method for hardware-based memoization of function cal...

Branch prefetch mechanisms for mitigating frontend branch resteers

Instruction set architecture based and automatic load tracking for...

System, apparatus and method for controlling allocations into a bra...

Misprediction-triggered local history-based branch prediction

Branch predictor with empirical branch bias override

Patents Applicationslast 30 patents

DEVICE, METHOD AND SYSTEM TO CAPTURE OR RESTORE MICROARCHITECTURAL...

INSTRUCTION ELIMINATION THROUGH HARDWARE DRIVEN MEMOIZATION OF LOOP...

SELECTIVE PROVISIONING OF SUPPLEMENTARY MICRO-OPERATION CACHE RESOU...

Throttling Code Fetch For Speculative Code Paths

DE-PRIORITIZING SPECULATIVE CODE LINES IN ON-CHIP CACHES

PREDICTION OF NEXT TAKEN BRANCHES IN A PROCESSOR

CACHING BASED ON BRANCH INSTRUCTIONS IN A PROCESSOR

APPARATUS AND METHOD FOR HARDWARE-BASED MEMOIZATION OF FUNCTION CAL...

Accessing A Branch Target Buffer Based On Branch Instruction Inform...

ALTERNATE PATH DECODE FOR HARD-TO-PREDICT BRANCH

SEGMENTED BRANCH TARGET BUFFER BASED ON BRANCH INSTRUCTION TYPE

BRANCH PREFETCH MECHANISMS FOR MITIGATING FRONTEND BRANCH RESTEERS

INSTRUCTION SET ARCHITECTURE BASED AND AUTOMATIC LOAD TRACKING FOR...

System, Apparatus And Method For Controlling Allocations Into A Bra...

METHOD AND APPARATUS FOR BRANCH PREDICTION UTILIZING PRIMARY AND SE...

MISPREDICTION-TRIGGERED LOCAL HISTORY-BASED BRANCH PREDICTION

Branch Predictor with Empirical Branch Bias Override