Nitesh Katta

Person

Hsinchu City, TW

People

Patents Grantslast 30 patents

Information Patent Grant
Post-silicon tuning in voltage control of semiconductor integrated...
- Patent number 9,564,896
- Issue date Feb 7, 2017
- Taiwan Semiconductor Manufacturing Co., Ltd
- Jerry Chang-Jui Kao
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Electromigration-aware layout generation
- Patent number 9,501,602
- Issue date Nov 22, 2016
- Taiwan Semiconductor Manufacturing Company Ltd.
- Nitesh Katta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power rail for preventing DC electromigration
- Patent number 9,405,883
- Issue date Aug 2, 2016
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chin-Shen Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electromigration-aware layout generation
- Patent number 9,367,660
- Issue date Jun 14, 2016
- Taiwan Semiconductor Manufacturing Company Ltd.
- Nitesh Katta
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cell characterization with Miller capacitance
- Patent number 9,201,107
- Issue date Dec 1, 2015
- Taiwan Semiconductor Manufacturing Company Ltd.
- Nitesh Katta
- G01 - MEASURING TESTING
Information Patent Grant
Power rail for preventing DC electromigration
- Patent number 9,165,882
- Issue date Oct 20, 2015
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chin-Shen Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Metal lines for preventing AC electromigration
- Patent number 9,152,751
- Issue date Oct 6, 2015
- Taiwan Semiconductor Manufacturing Co., Ltd
- Chin-Shen Lin
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
POWER RAIL FOR PREVENTING DC ELECTROMIGRATION
- Publication number 20160004809
- Publication date Jan 7, 2016
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chin-Shen LIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTROMIGRATION-AWARE LAYOUT GENERATION
- Publication number 20150302128
- Publication date Oct 22, 2015
- Taiwan Semiconductor Manufacturing company Ltd.
- NITESH KATTA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELECTROMIGRATION-AWARE LAYOUT GENERATION
- Publication number 20150269302
- Publication date Sep 24, 2015
- Taiwan Semiconductor Manufacturing company Ltd.
- NITESH KATTA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER RAIL FOR PREVENTING DC ELECTROMIGRATION
- Publication number 20150095864
- Publication date Apr 2, 2015
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chin-Shen LIN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METAL LINES FOR PREVENTING AC ELECTROMIGRATION
- Publication number 20150095873
- Publication date Apr 2, 2015
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Chin-Shen Lin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POST-SILICON TUNING IN VOLTAGE CONTROL OF SEMICONDUCTOR INTEGRATED...
- Publication number 20150091543
- Publication date Apr 2, 2015
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Jerry Chang-Jui KAO
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
CELL CHARACTERIZATION WITH MILLER CAPACITANCE
- Publication number 20150035551
- Publication date Feb 5, 2015
- Taiwan Semiconductor Manufacturing company Ltd.
- NITESH KATTA
- G01 - MEASURING TESTING

Nitesh Katta

Person

Patents Grantslast 30 patents

Post-silicon tuning in voltage control of semiconductor integrated...

Electromigration-aware layout generation

Power rail for preventing DC electromigration

Electromigration-aware layout generation

Cell characterization with Miller capacitance

Power rail for preventing DC electromigration

Metal lines for preventing AC electromigration

Patents Applicationslast 30 patents

POWER RAIL FOR PREVENTING DC ELECTROMIGRATION

ELECTROMIGRATION-AWARE LAYOUT GENERATION

ELECTROMIGRATION-AWARE LAYOUT GENERATION

POWER RAIL FOR PREVENTING DC ELECTROMIGRATION

METAL LINES FOR PREVENTING AC ELECTROMIGRATION

POST-SILICON TUNING IN VOLTAGE CONTROL OF SEMICONDUCTOR INTEGRATED...

CELL CHARACTERIZATION WITH MILLER CAPACITANCE