Nitesh Naidu

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Bangalore, IN

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Patents Grantslast 30 patents

Information Patent Grant
Generating divided signals from phase-locked loop (PLL) output when...
- Patent number 12,149,255
- Issue date Nov 19, 2024
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Raja Prabhu J
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Generating divided signals from phase-locked loop (PLL) output when...
- Patent number 11,967,965
- Issue date Apr 23, 2024
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Raja Prabhu J
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Obtaining lock in a phase-locked loop (PLL) upon being out of phase...
- Patent number 11,588,489
- Issue date Feb 21, 2023
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Rakesh Kumar Gupta
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
GENERATING DIVIDED SIGNALS FROM PHASE-LOCKED LOOP (PLL) OUTPUT WHEN...
- Publication number 20240154617
- Publication date May 9, 2024
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Raja Prabhu J
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
GENERATING DIVIDED SIGNALS FROM PHASE-LOCKED LOOP (PLL) OUTPUT WHEN...
- Publication number 20230136353
- Publication date May 4, 2023
- Shaoxing Yuanfang Semiconductor Co., Ltd.
- Raja Prabhu J
- H03 - BASIC ELECTRONIC CIRCUITRY