Nitin JAIN

Person

GHAZIABAD, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Low power crystal oscillator
- Patent number 11,901,865
- Issue date Feb 13, 2024
- STMICROELECTRONICS INTERNATIONAL N.V.
- Anand Kumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low power crystal oscillator
- Patent number 11,082,006
- Issue date Aug 3, 2021
- STMicroelectronics International N.V.
- Anand Kumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Locked loop circuit with reference signal provided by un-trimmed os...
- Patent number 10,862,487
- Issue date Dec 8, 2020
- STMicroelectronics International N.V.
- Anand Kumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Locked loop circuit with reference signal provided by un-trimmed os...
- Patent number 10,505,552
- Issue date Dec 10, 2019
- STMicroelectronics International N.V.
- Anand Kumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Compensation circuit and inverter stage for oscillator circuit
- Patent number 9,461,584
- Issue date Oct 4, 2016
- STMicroelectronics International N.V.
- Gauri Mittal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
File system management and balancing
- Patent number 8,959,118
- Issue date Feb 17, 2015
- Hewlett-Packard Development Company, L.P.
- Eric A Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Write circuitry for hierarchical memory architectures
- Patent number 8,649,230
- Issue date Feb 11, 2014
- STMicroelectronics International N.V.
- Siddharth Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and apparatus for decoding multiple independent audio strea...
- Patent number 8,613,038
- Issue date Dec 17, 2013
- STMicroelectronics International N.V.
- Rahul Bansal
- G10 - MUSICAL INSTRUMENTS ACOUSTICS
Information Patent Grant
Read only memory device with complemenary bit line pair
- Patent number 8,605,480
- Issue date Dec 10, 2013
- STMicroelectronics International N.V.
- Nitin Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
Write circuitry for hierarchical memory architectures
- Patent number 8,526,246
- Issue date Sep 3, 2013
- STMicroelectronics International N.V.
- Siddharth Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for testing of a memory with redundancy elements
- Patent number 8,458,545
- Issue date Jun 4, 2013
- STMicroelectronics International N.V.
- Tanmoy Roy
- G11 - INFORMATION STORAGE
Information Patent Grant
Processing clock signals
- Patent number 8,237,483
- Issue date Aug 7, 2012
- STMicroelectronics International N.V.
- Nitin Gupta
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Write circuitry for hierarchical memory architecture
- Patent number 8,130,567
- Issue date Mar 6, 2012
- STMicroelectronics Pvt. Ltd.
- Siddharth Gupta
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
LOW POWER CRYSTAL OSCILLATOR
- Publication number 20230421101
- Publication date Dec 28, 2023
- STMicroelectronics International N.V.
- Anand KUMAR
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOW POWER CRYSTAL OSCILLATOR WITH AUTOMATIC AMPLITUDE CONTROL
- Publication number 20230412155
- Publication date Dec 21, 2023
- STMicroelectronics International N.V.
- Nitin JAIN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOW POWER CRYSTAL OSCILLATOR
- Publication number 20230090782
- Publication date Mar 23, 2023
- STMicroelectronics International N.V.
- Anand KUMAR
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOW POWER CRYSTAL OSCILLATOR
- Publication number 20200235702
- Publication date Jul 23, 2020
- STMicroelectronics International N.V.
- Anand KUMAR
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOCKED LOOP CIRCUIT WITH REFERENCE SIGNAL PROVIDED BY UN-TRIMMED OS...
- Publication number 20200076437
- Publication date Mar 5, 2020
- STMicroelectronics International N.V.
- Anand Kumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SELF-COMPENSATED OSCILLATOR CIRCUIT
- Publication number 20190334509
- Publication date Oct 31, 2019
- STMicroelectronics International N.V.
- Nitin GUPTA
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LOCKED LOOP CIRCUIT WITH REFERENCE SIGNAL PROVIDED BY UN-TRIMMED OS...
- Publication number 20180287617
- Publication date Oct 4, 2018
- STMicroelectronics International N.V.
- Anand Kumar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMPENSATION CIRCUIT AND INVERTER STAGE FOR OSCILLATOR CIRCUIT
- Publication number 20160181978
- Publication date Jun 23, 2016
- STMicroelectronics International N.V
- Gauri Mittal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
VOLTAGE LEVEL SHIFTER CIRCUIT, SYSTEM, AND METHOD FOR HIGH SPEED AP...
- Publication number 20140300386
- Publication date Oct 9, 2014
- STMicroelectronics International N.V
- Nitin JAIN
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
WRITE CIRCUITRY FOR HIERARCHICAL MEMORY ARCHITECTURES
- Publication number 20130343137
- Publication date Dec 26, 2013
- STMicroelectronics International N.V
- Siddharth GUPTA
- G11 - INFORMATION STORAGE
Information Patent Application
MAPPING LONG NAMES IN A FILESYSTEM
- Publication number 20130290383
- Publication date Oct 31, 2013
- Jain Nitin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FILE SYSTEM MANAGEMENT AND BALANCING
- Publication number 20130290384
- Publication date Oct 31, 2013
- Eric A. Anderson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSING CLOCK SIGNALS
- Publication number 20120169393
- Publication date Jul 5, 2012
- STMICROELECTRONICS PVT. LTD.
- Nitin Gupta
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY DEVICE
- Publication number 20120163064
- Publication date Jun 28, 2012
- STMICROELECTRONICS PVT. LTD.
- Nitin Jain
- G11 - INFORMATION STORAGE
Information Patent Application
WRITE CIRCUITRY FOR HIERARCHICAL MEMORY ARCHITECTURES
- Publication number 20120140582
- Publication date Jun 7, 2012
- STMICROELECTRONICS PVT. LTD.
- Siddharth GUPTA
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR TESTING OF A MEMORY WITH REDUNDANCY ELEMENTS
- Publication number 20120137188
- Publication date May 31, 2012
- STMICROELECTRONICS PVT. LTD.
- Tanmoy Roy
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUS FOR DECODING MULTIPLE INDEPENDENT AUDIO STREA...
- Publication number 20120102538
- Publication date Apr 26, 2012
- STMicroelectronics (Grenoble) SAS
- Rahul Bansal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
WRITE CIRCUITRY FOR HIERARCHICAL MEMORY ARCHITECTURE
- Publication number 20100157699
- Publication date Jun 24, 2010
- STMICROELECTRONICS PVT. LTD.
- Siddharth GUPTA
- G11 - INFORMATION STORAGE
Information Patent Application
SYNCHRONIZATION OF SECONDARY DECODED MEDIA STREAMS WITH A PRIMARY M...
- Publication number 20100091188
- Publication date Apr 15, 2010
- STMicroelectronics Pvt. Ltd.
- Kausik Maiti
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Person

Patents Grantslast 30 patents

Low power crystal oscillator

Low power crystal oscillator

Locked loop circuit with reference signal provided by un-trimmed os...

Locked loop circuit with reference signal provided by un-trimmed os...

Compensation circuit and inverter stage for oscillator circuit

File system management and balancing

Write circuitry for hierarchical memory architectures

Methods and apparatus for decoding multiple independent audio strea...

Read only memory device with complemenary bit line pair

Write circuitry for hierarchical memory architectures

Method and apparatus for testing of a memory with redundancy elements

Processing clock signals

Write circuitry for hierarchical memory architecture

Patents Applicationslast 30 patents

LOW POWER CRYSTAL OSCILLATOR

LOW POWER CRYSTAL OSCILLATOR WITH AUTOMATIC AMPLITUDE CONTROL

LOW POWER CRYSTAL OSCILLATOR

LOW POWER CRYSTAL OSCILLATOR

LOCKED LOOP CIRCUIT WITH REFERENCE SIGNAL PROVIDED BY UN-TRIMMED OS...

SELF-COMPENSATED OSCILLATOR CIRCUIT

LOCKED LOOP CIRCUIT WITH REFERENCE SIGNAL PROVIDED BY UN-TRIMMED OS...

COMPENSATION CIRCUIT AND INVERTER STAGE FOR OSCILLATOR CIRCUIT

VOLTAGE LEVEL SHIFTER CIRCUIT, SYSTEM, AND METHOD FOR HIGH SPEED AP...

WRITE CIRCUITRY FOR HIERARCHICAL MEMORY ARCHITECTURES

MAPPING LONG NAMES IN A FILESYSTEM

FILE SYSTEM MANAGEMENT AND BALANCING

PROCESSING CLOCK SIGNALS

MEMORY DEVICE

WRITE CIRCUITRY FOR HIERARCHICAL MEMORY ARCHITECTURES

METHOD AND APPARATUS FOR TESTING OF A MEMORY WITH REDUNDANCY ELEMENTS

METHODS AND APPARATUS FOR DECODING MULTIPLE INDEPENDENT AUDIO STREA...

WRITE CIRCUITRY FOR HIERARCHICAL MEMORY ARCHITECTURE

SYNCHRONIZATION OF SECONDARY DECODED MEDIA STREAMS WITH A PRIMARY M...