Nitin Y. Borkar

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Emulating scratchpad functionality using caches in processor-based...
- Patent number 11,755,498
- Issue date Sep 12, 2023
- QUALCOMM Incorporated
- Shekhar Yeshwant Borkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
In-line memory module (IMM) computing node with an embedded process...
- Patent number 11,194,744
- Issue date Dec 7, 2021
- Qualcomm Intelligent Solutions, Inc
- David Stewart Dunning
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory system supporting programmable selective access to subsets o...
- Patent number 11,093,416
- Issue date Aug 17, 2021
- Qualcomm Intelligent Solutions, Inc
- David Stewart Dunning
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for fusion of compute and switching functions...
- Patent number 9,992,135
- Issue date Jun 5, 2018
- Intel Corporation
- Surhud Khare
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Performing variation-aware profiling and dynamic core allocation fo...
- Patent number 9,063,730
- Issue date Jun 23, 2015
- Intel Corporation
- Saurabh Dighe
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Scalable distributed memory and I/O multiprocessor system
- Patent number 8,745,306
- Issue date Jun 3, 2014
- Intel Corporation
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performance and traffic aware heterogeneous interconnection network
- Patent number 8,379,659
- Issue date Feb 19, 2013
- Intel Corporation
- Sriram R. Vangal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Power management integrated circuit
- Patent number 8,288,846
- Issue date Oct 16, 2012
- Intel Corporation
- Siva G. Narendra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Scalable distributed memory and I/O multiprocessor system
- Patent number 8,255,605
- Issue date Aug 28, 2012
- Intel Corporation
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable memory and I/O multiprocessor systems
- Patent number 7,930,464
- Issue date Apr 19, 2011
- Intel Corporation
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
CPU power delivery system
- Patent number 7,698,576
- Issue date Apr 13, 2010
- Intel Corporation
- Siva G. Narendra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power management integrated circuit
- Patent number 7,671,456
- Issue date Mar 2, 2010
- Intel Corporation
- Siva G. Narendra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hardware-based multi-threading for packet processing
- Patent number 7,668,165
- Issue date Feb 23, 2010
- Intel Corporation
- Yatin Hoskote
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Communications receiver with digital counter
- Patent number 7,620,119
- Issue date Nov 17, 2009
- Intel Corporation
- Siva G. Narendra
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Scalable distributed memory and I/O multiprocessor systems and asso...
- Patent number 7,603,508
- Issue date Oct 13, 2009
- Intel Corporation
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable distributed memory and I/O multiprocessor systems and asso...
- Patent number 7,343,442
- Issue date Mar 11, 2008
- Intel Corporation
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power management integrated circuit
- Patent number 7,247,930
- Issue date Jul 24, 2007
- Intel Corporation
- Siva G. Narendra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Network protocol engine
- Patent number 7,181,544
- Issue date Feb 20, 2007
- Intel Corporation
- Sriram R. Vangal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Scalable distributed memory and I/O multiprocessor system
- Patent number 7,058,750
- Issue date Jun 6, 2006
- Intel Corporation
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
IC design process including automated removal of body contacts from...
- Patent number 7,051,295
- Issue date May 23, 2006
- Intel Corporation
- Siva G. Narendra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packet-based clock signal
- Patent number 7,016,354
- Issue date Mar 21, 2006
- Intel Corporation
- Sriram R. Vangal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Charge recycling decoder, method, and system
- Patent number 6,865,134
- Issue date Mar 8, 2005
- Intel Corporation
- Sriram R. Vangal
- G11 - INFORMATION STORAGE
Information Patent Grant
Low jitter external clocking
- Patent number 6,798,265
- Issue date Sep 28, 2004
- Intel Corporation
- Rajendran Nair
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low jitter external clocking
- Patent number 6,411,151
- Issue date Jun 25, 2002
- Inter Corporation
- Rajendran Nair
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for gracious arbitration of access to a computer...
- Patent number 5,930,486
- Issue date Jul 27, 1999
- Intel Corporation
- Lily Pao Looi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for providing remote memory access in a distri...
- Patent number 5,613,071
- Issue date Mar 18, 1997
- Intel Corporation
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Conditional carry scheduler for round robin scheduling
- Patent number 5,357,512
- Issue date Oct 18, 1994
- Intel Corporation
- Manpreet S. Khaira
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
EMULATING SCRATCHPAD FUNCTIONALITY USING CACHES IN PROCESSOR-BASED...
- Publication number 20210311754
- Publication date Oct 7, 2021
- Qualcomm Intelligent Solutions, Inc.
- Shekhar Yeshwant Borkar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IN-LINE MEMORY MODULE (IMM) COMPUTING NODE WITH AN EMBEDDED PROCESS...
- Publication number 20210286740
- Publication date Sep 16, 2021
- Qualcomm Intelligent Solutions, Inc.
- David Stewart Dunning
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR FUSION OF COMPUTE AND SWITCHING FUNCTIONS...
- Publication number 20170171111
- Publication date Jun 15, 2017
- Intel Corporation
- Surhud Khare
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
POWER MANAGEMENT INTEGRATED CIRCUIT
- Publication number 20160170456
- Publication date Jun 16, 2016
- Intel Corporation
- Siva G. Narendra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER MANAGEMENT INTEGRATED CIRCUIT
- Publication number 20140089687
- Publication date Mar 27, 2014
- Siva G. Narendra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEM
- Publication number 20120317328
- Publication date Dec 13, 2012
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Performing Variation-Aware Profiling And Dynamic Core Allocation Fo...
- Publication number 20120159496
- Publication date Jun 21, 2012
- Saurabh Dighe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Performance And Traffic Aware Heterogeneous Interconnection Network
- Publication number 20110235531
- Publication date Sep 29, 2011
- Sriram R. Vangal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEM
- Publication number 20110185101
- Publication date Jul 28, 2011
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power management integrated circuit
- Publication number 20100219516
- Publication date Sep 2, 2010
- Siva G. Narendra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CPU POWER DELIVERY SYSTEM
- Publication number 20100115301
- Publication date May 6, 2010
- Siva G. Narendra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEMS AND ASSO...
- Publication number 20090319717
- Publication date Dec 24, 2009
- Intel Corporation
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEMS AND ASSO...
- Publication number 20080114919
- Publication date May 15, 2008
- Intel Corporation
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power mangement integrated circuit
- Publication number 20070260848
- Publication date Nov 8, 2007
- Siva G. Narendra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Scalable distributed memory and I/O multiprocessor systems and asso...
- Publication number 20070106833
- Publication date May 10, 2007
- Intel Corporation
- Linda J. Rankin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CPU power delivery system
- Publication number 20060099734
- Publication date May 11, 2006
- Siva G. Narendra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power management integrated circuit
- Publication number 20060071648
- Publication date Apr 6, 2006
- Siva G. Narendra
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CPU power delivery system
- Publication number 20060071650
- Publication date Apr 6, 2006
- Siva G. Narendra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Communications receiver with digital counter
- Publication number 20050286655
- Publication date Dec 29, 2005
- Siva G. Narendra
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Hardware-based multi-threading for packet processing
- Publication number 20050226238
- Publication date Oct 13, 2005
- Yatin Hoskote
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Network protocol processor
- Publication number 20050165985
- Publication date Jul 28, 2005
- Sriram R. Vangal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IC design process including automated removal of body contacts from...
- Publication number 20050138579
- Publication date Jun 23, 2005
- Siva G. Narendra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low jitter external clocking
- Publication number 20050007163
- Publication date Jan 13, 2005
- Intel Corporation
- Rajendran Nair
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Charge recycling decoder, method, and system
- Publication number 20040264281
- Publication date Dec 30, 2004
- Intel Corporation
- Sriram R. Vangal
- G11 - INFORMATION STORAGE
Information Patent Application
Network protocol engine
- Publication number 20040193733
- Publication date Sep 30, 2004
- Sriram R. Vangal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Tracking out-of-order packets
- Publication number 20040044796
- Publication date Mar 4, 2004
- Sriram R. Vangal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Packet-based clock signal
- Publication number 20040042497
- Publication date Mar 4, 2004
- Sriram R. Vangal
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Low jitter external clocking
- Publication number 20020125930
- Publication date Sep 12, 2002
- Intel Corporation
- Rajendran Nair
- G06 - COMPUTING CALCULATING COUNTING

Nitin Y. Borkar

Person

Patents Grantslast 30 patents

Emulating scratchpad functionality using caches in processor-based...

In-line memory module (IMM) computing node with an embedded process...

Memory system supporting programmable selective access to subsets o...

Apparatus and method for fusion of compute and switching functions...

Performing variation-aware profiling and dynamic core allocation fo...

Scalable distributed memory and I/O multiprocessor system

Performance and traffic aware heterogeneous interconnection network

Power management integrated circuit

Scalable distributed memory and I/O multiprocessor system

Scalable memory and I/O multiprocessor systems

CPU power delivery system

Power management integrated circuit

Hardware-based multi-threading for packet processing

Communications receiver with digital counter

Scalable distributed memory and I/O multiprocessor systems and asso...

Scalable distributed memory and I/O multiprocessor systems and asso...

Power management integrated circuit

Network protocol engine

Scalable distributed memory and I/O multiprocessor system

IC design process including automated removal of body contacts from...

Packet-based clock signal

Charge recycling decoder, method, and system

Low jitter external clocking

Low jitter external clocking

Method and device for gracious arbitration of access to a computer...

Method and apparatus for providing remote memory access in a distri...

Conditional carry scheduler for round robin scheduling

Patents Applicationslast 30 patents

EMULATING SCRATCHPAD FUNCTIONALITY USING CACHES IN PROCESSOR-BASED...

IN-LINE MEMORY MODULE (IMM) COMPUTING NODE WITH AN EMBEDDED PROCESS...

APPARATUS AND METHOD FOR FUSION OF COMPUTE AND SWITCHING FUNCTIONS...

POWER MANAGEMENT INTEGRATED CIRCUIT

POWER MANAGEMENT INTEGRATED CIRCUIT

SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEM

Performing Variation-Aware Profiling And Dynamic Core Allocation Fo...

Performance And Traffic Aware Heterogeneous Interconnection Network

SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEM

Power management integrated circuit

CPU POWER DELIVERY SYSTEM

SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEMS AND ASSO...

SCALABLE DISTRIBUTED MEMORY AND I/O MULTIPROCESSOR SYSTEMS AND ASSO...

Power mangement integrated circuit

Scalable distributed memory and I/O multiprocessor systems and asso...

CPU power delivery system

Power management integrated circuit

CPU power delivery system

Communications receiver with digital counter

Hardware-based multi-threading for packet processing

Network protocol processor

IC design process including automated removal of body contacts from...

Low jitter external clocking

Charge recycling decoder, method, and system

Network protocol engine

Tracking out-of-order packets

Packet-based clock signal

Low jitter external clocking