Niyati Shah

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Logical and physical optimizations for partial reconfiguration desi...
- Patent number 10,303,648
- Issue date May 28, 2019
- Xilinx, Inc.
- Sabyasachi Das
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuit design implementation using control-set based merging and m...
- Patent number 10,242,150
- Issue date Mar 26, 2019
- Xilinx, Inc.
- Sabyasachi Das
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fanout optimization to facilitate timing improvement in circuit des...
- Patent number 9,965,581
- Issue date May 8, 2018
- Xilinx, Inc.
- Sabyasachi Das
- G06 - COMPUTING CALCULATING COUNTING