NOBUTAKA TANIGUCHI

Person

KAWASAKI-SHI, JP

People

Patents Grantslast 30 patents

Information Patent Grant
Delay time adjusting method of delaying a phase of an output signal...
- Patent number 7,667,509
- Issue date Feb 23, 2010
- Fujitsu Microelectronics Ltd.
- Nobutaka Taniguchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-value nonvolatile semiconductor memory device equipped with r...
- Patent number 7,307,885
- Issue date Dec 11, 2007
- Fujitsu Limited
- Toshimi Ikeda
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory device
- Patent number 7,184,296
- Issue date Feb 27, 2007
- Fujitsu Limited
- Atsushi Hatakeyama
- G11 - INFORMATION STORAGE
Information Patent Grant
Delay time adjusting method of delaying a phase of an output signal...
- Patent number 7,106,114
- Issue date Sep 12, 2006
- Fujitsu Limited
- Nobutaka Taniguchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit device incorporating DLL circuit
- Patent number 6,522,182
- Issue date Feb 18, 2003
- Fujitsu Limited
- Hiroyoshi Tomita
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor device using external power voltage for timing sensit...
- Patent number 6,288,585
- Issue date Sep 11, 2001
- Fujitsu Limited
- Yoshihide Bando
- G11 - INFORMATION STORAGE
Information Patent Grant
Timing clock generation circuit using hierarchical DLL circuit
- Patent number 6,242,954
- Issue date Jun 5, 2001
- Fujitsu Limited
- Nobutaka Taniguchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit device
- Patent number 6,225,843
- Issue date May 1, 2001
- Fujitsu Limited
- Nobutaka Taniguchi
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit device
- Patent number 6,194,932
- Issue date Feb 27, 2001
- Fujitsu Limited
- Yoshihiro Takemae
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit device
- Patent number 6,181,174
- Issue date Jan 30, 2001
- Fujitsu Limited
- Waichirou Fujieda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor device having timing-stabilization circuit and method...
- Patent number 6,108,793
- Issue date Aug 22, 2000
- Fujitsu Limited
- Yasuhiro Fujii
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Semiconductor integrated circuit
- Patent number 6,031,788
- Issue date Feb 29, 2000
- Fujitsu Limited
- Yoshihide Bando
- G11 - INFORMATION STORAGE
Information Patent Grant
Semiconductor memory device
- Patent number 5,901,101
- Issue date May 4, 1999
- Fujitsu Limited
- Takaaki Suzuki
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
Delay time adjusting method of delaying a phase of an output signal...
- Publication number 20060176092
- Publication date Aug 10, 2006
- FUJITSU LIMITED
- Nobutaka Taniguchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Memory device
- Publication number 20050185465
- Publication date Aug 25, 2005
- FUJITSU LIMITED
- Nobutaka Taniguchi
- G11 - INFORMATION STORAGE
Information Patent Application
Nonvolatile semiconductor memory device
- Publication number 20050162955
- Publication date Jul 28, 2005
- FUJITSU LIMITED
- Toshimi Ikeda
- G11 - INFORMATION STORAGE
Information Patent Application
Memory device
- Publication number 20050141306
- Publication date Jun 30, 2005
- FUJITSU LIMITED
- Atsushi Hatakeyama
- G11 - INFORMATION STORAGE
Information Patent Application
Semiconductor device with dummy interface circuit
- Publication number 20020050847
- Publication date May 2, 2002
- Nobutaka Taniguchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTEGRATED CIRCUIT DEVICE INCORPORATING DLL CIRCUIT
- Publication number 20010043100
- Publication date Nov 22, 2001
- HIROYOSHI TOMITA
- G11 - INFORMATION STORAGE
Information Patent Application
Method for adjusting phase of controlling clock signal and semicond...
- Publication number 20010028266
- Publication date Oct 11, 2001
- FUJITSU LIMITED
- Nobutaka Taniguchi
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Delay time adjusting circuit comprising frequency dividers having d...
- Publication number 20010016022
- Publication date Aug 23, 2001
- FUJITSU LIMITED
- Nobutaka Taniguchi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Delay time adjusting method of delaying a phase of an output signal...
- Publication number 20010015664
- Publication date Aug 23, 2001
- FUJITSU LIMITED
- Nobutaka Taniguchi
- H03 - BASIC ELECTRONIC CIRCUITRY

NOBUTAKA TANIGUCHI

Person

Patents Grantslast 30 patents

Delay time adjusting method of delaying a phase of an output signal...

Multi-value nonvolatile semiconductor memory device equipped with r...

Memory device

Delay time adjusting method of delaying a phase of an output signal...

Integrated circuit device incorporating DLL circuit

Semiconductor device using external power voltage for timing sensit...

Timing clock generation circuit using hierarchical DLL circuit

Semiconductor integrated circuit device

Integrated circuit device

Semiconductor integrated circuit device

Semiconductor device having timing-stabilization circuit and method...

Semiconductor integrated circuit

Semiconductor memory device

Patents Applicationslast 30 patents

Delay time adjusting method of delaying a phase of an output signal...

Memory device

Nonvolatile semiconductor memory device

Memory device

Semiconductor device with dummy interface circuit

INTEGRATED CIRCUIT DEVICE INCORPORATING DLL CIRCUIT

Method for adjusting phase of controlling clock signal and semicond...

Delay time adjusting circuit comprising frequency dividers having d...

Delay time adjusting method of delaying a phase of an output signal...