Norbert Schumacher

Person

Neuhausen, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Retrieving odd net topology in hierarchical circuit designs
- Patent number 9,064,074
- Issue date Jun 23, 2015
- International Business Machines Corporation
- Joerg Kayser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simulating an operation of a digital circuit
- Patent number 8,346,527
- Issue date Jan 1, 2013
- International Business Machines Corporation
- Joerg Walter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for validating logical function and timing behavior of a dig...
- Patent number 8,056,037
- Issue date Nov 8, 2011
- International Business Machines Corporation
- Juergen Koehl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and arrangement for local sychronization in master-slave dis...
- Patent number 8,009,702
- Issue date Aug 30, 2011
- International Business Machines Corporation
- Michel Colmant
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Buffered crossbar switch
- Patent number 7,826,434
- Issue date Nov 2, 2010
- International Business Machines Corporation
- Gottfried Andreas Goldrian
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and arrangement for local synchronization in master-slave di...
- Patent number 7,720,105
- Issue date May 18, 2010
- International Business Machines Corporation
- Michael Colmant
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Chip circuit for combined and data compressed FIFO arbitration for...
- Patent number 7,675,930
- Issue date Mar 9, 2010
- International Business Machines Corporaiton
- Francois Abel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Combined and data compressed FIFO based arbitration for a non-block...
- Patent number 7,379,470
- Issue date May 27, 2008
- International Business Machines Coproration
- Francois Abel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Buffered crossbar switch and its method of operation
- Patent number 7,349,388
- Issue date Mar 25, 2008
- International Business Machines Corporation
- Gottfried Andreas Goldrian
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method of operating a crossbar switch
- Patent number 7,269,158
- Issue date Sep 11, 2007
- International Business Machines Corporation
- Abel Francois
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Control logic implementation for a non-blocking switch network
- Patent number 7,197,540
- Issue date Mar 27, 2007
- International Business Machines Corporation
- Gottfried A. Goldrian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Switching arrangement and method with separated output buffers
- Patent number 7,145,873
- Issue date Dec 5, 2006
- International Business Machines Corporation
- Ronald P. Luijten
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
IML-stream generated error insertion / FRU isolation
- Patent number 7,107,490
- Issue date Sep 12, 2006
- International Business Machines Corporation
- Andreas Eisenhoffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of operating a crossbar switch
- Patent number 7,089,346
- Issue date Aug 8, 2006
- International Business Machines Corporation
- Markus Cebulla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of operating a buffered crossbar switch
- Patent number 6,909,710
- Issue date Jun 21, 2005
- International Business Machines Corporation
- Gottfried Andreas Goldrian
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Checking data integrity in buffered data transmission
- Patent number 5,694,400
- Issue date Dec 2, 1997
- International Business Machines Corporation
- Gilles Gervais
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for checking the address and contents of a mem...
- Patent number 5,321,706
- Issue date Jun 14, 1994
- International Business Machines Corporation
- Ingemar Holm
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable neural logic device
- Patent number 5,218,245
- Issue date Jun 8, 1993
- International Business Machines Corporation
- Helmut Kohler
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
RETRIEVING ODD NET TOPOLOGY IN HIERARCHICAL CIRCUIT DESIGNS
- Publication number 20130124182
- Publication date May 16, 2013
- International Business Machines Corporation
- Joerg Kayser
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND ARRANGEMENT FOR LOCAL SYCHRONIZATION IN MASTER-SLAVE DIS...
- Publication number 20100220749
- Publication date Sep 2, 2010
- International Business Machines Corporation
- Michael COLMANT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Simulating an Operation of a Digital Circuit
- Publication number 20090182545
- Publication date Jul 16, 2009
- International Business Machines Corporation
- Joerg Walter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Violating the Logical Function and Timing Behavior of a...
- Publication number 20090083684
- Publication date Mar 26, 2009
- International Business Machines Corporation
- Juergen Koehl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BUFFERED CROSSBAR SWITCH
- Publication number 20080089352
- Publication date Apr 17, 2008
- International Business Machines Corporation
- Gottfried Andreas Goldrian
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Combined and data compressed fifo based arbitration for a non-block...
- Publication number 20050099945
- Publication date May 12, 2005
- International Business Machines Corporation
- Francois Abel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method of operating a crossbar switch
- Publication number 20040073739
- Publication date Apr 15, 2004
- International Business Machines Corporation
- Markus Cebulla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of operating a crossbar switch
- Publication number 20040047334
- Publication date Mar 11, 2004
- International Business Machines Corporation
- Abel Francois
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
IML-stream generated error insertion / FRU isolation
- Publication number 20030126503
- Publication date Jul 3, 2003
- International Business Machines Corporation
- Andreas Eisenhoffer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Control logic implementation for a non-blocking switch network
- Publication number 20020152263
- Publication date Oct 17, 2002
- International Business Machines Corporation
- Gottfried A. Goldrian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Switching arrangement and method with separated output buffers
- Publication number 20020118689
- Publication date Aug 29, 2002
- Ronald P. Luijten
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Norbert Schumacher

Person

Patents Grantslast 30 patents

Retrieving odd net topology in hierarchical circuit designs

Simulating an operation of a digital circuit

Method for validating logical function and timing behavior of a dig...

Method and arrangement for local sychronization in master-slave dis...

Buffered crossbar switch

Method and arrangement for local synchronization in master-slave di...

Chip circuit for combined and data compressed FIFO arbitration for...

Combined and data compressed FIFO based arbitration for a non-block...

Buffered crossbar switch and its method of operation

Method of operating a crossbar switch

Control logic implementation for a non-blocking switch network

Switching arrangement and method with separated output buffers

IML-stream generated error insertion / FRU isolation

Method of operating a crossbar switch

Method of operating a buffered crossbar switch

Checking data integrity in buffered data transmission

Method and apparatus for checking the address and contents of a mem...

Programmable neural logic device

Patents Applicationslast 30 patents

RETRIEVING ODD NET TOPOLOGY IN HIERARCHICAL CIRCUIT DESIGNS

METHOD AND ARRANGEMENT FOR LOCAL SYCHRONIZATION IN MASTER-SLAVE DIS...

Simulating an Operation of a Digital Circuit

Method for Violating the Logical Function and Timing Behavior of a...

BUFFERED CROSSBAR SWITCH

Combined and data compressed fifo based arbitration for a non-block...

Method of operating a crossbar switch

Method of operating a crossbar switch

IML-stream generated error insertion / FRU isolation

Control logic implementation for a non-blocking switch network

Switching arrangement and method with separated output buffers