Norio Watanabe

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Moroyama, JP

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Patents Grantslast 30 patents

Information Patent Grant
Fabrication method of semiconductor integrated circuit device
- Patent number 8,259,295
- Issue date Sep 4, 2012
- Renesas Electronics Corporation
- Norio Watanabe
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Fabrication method of semiconductor integrated circuit device
- Patent number 8,125,632
- Issue date Feb 28, 2012
- Renesas Electronics Corporation
- Norio Watanabe
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of fabrication of semiconductor integrated circuit device
- Patent number 7,372,555
- Issue date May 13, 2008
- Renesas Technology Corp.
- Norio Watanabe
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
- Publication number 20120149136
- Publication date Jun 14, 2012
- Norio Watanabe
- G01 - MEASURING TESTING
Information Patent Application
FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
- Publication number 20090221103
- Publication date Sep 3, 2009
- Norio Watanabe
- G01 - MEASURING TESTING
Information Patent Application
FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
- Publication number 20080232676
- Publication date Sep 25, 2008
- Norio Watanabe
- G01 - MEASURING TESTING
Information Patent Application
Fabrication method of semiconductor integrated circuit device
- Publication number 20050162644
- Publication date Jul 28, 2005
- Norio Watanabe
- G01 - MEASURING TESTING