Norman P. Jouppi

Person

San Mateo, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Error checking for systolic array computation
- Patent number 12,189,472
- Issue date Jan 7, 2025
- Google LLC
- Doe Hyun Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware-optimized neural architecture search
- Patent number 12,131,244
- Issue date Oct 29, 2024
- Google LLC
- Sheng Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating recommendations based on performance metrics for schedul...
- Patent number 12,056,534
- Issue date Aug 6, 2024
- Google LLC
- Sheng Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing matrix multiplication in hardware
- Patent number 11,989,258
- Issue date May 21, 2024
- Google LLC
- Andrew Everett Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency matrix multiply unit
- Patent number 11,989,259
- Issue date May 21, 2024
- Google LLC
- Andrew Everett Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector reductions using shared scratchpad memory
- Patent number 11,934,826
- Issue date Mar 19, 2024
- Google LLC
- Thomas Norrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Shared scratchpad memory with parallel load-store
- Patent number 11,922,292
- Issue date Mar 5, 2024
- Google LLC
- Thomas Norrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modifying machine learning models to improve locality
- Patent number 11,915,139
- Issue date Feb 27, 2024
- Google LLC
- Doe Hyun Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency matrix multiply unit
- Patent number 11,907,330
- Issue date Feb 20, 2024
- Google LLC
- Andrew Everett Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error checking for systolic array computation
- Patent number 11,853,156
- Issue date Dec 26, 2023
- Google LLC
- Doe Hyun Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cooling electronic devices in a data center
- Patent number 11,832,396
- Issue date Nov 28, 2023
- Google LLC
- Madhusudan Krishnan Iyengar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cross replica reduction on networks having degraded nodes
- Patent number 11,715,010
- Issue date Aug 1, 2023
- Google LLC
- Bjarke Hammersholt Roune
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency matrix multiply unit
- Patent number 11,599,601
- Issue date Mar 7, 2023
- Google LLC
- Andrew Everett Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural network processor
- Patent number 11,586,920
- Issue date Feb 21, 2023
- Google LLC
- Jonathan Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel processing of reduction and broadcast operations on large...
- Patent number 11,551,138
- Issue date Jan 10, 2023
- Google LLC
- Ian Moray Mclaren
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Recommendations for scheduling jobs on distributed computing devices
- Patent number 11,544,105
- Issue date Jan 3, 2023
- Google LLC
- Sheng Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector processing unit
- Patent number 11,520,581
- Issue date Dec 6, 2022
- Google LLC
- William Lacy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error checking for systolic array computation
- Patent number 11,507,452
- Issue date Nov 22, 2022
- Google LLC
- Doe Hyun Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency matrix multiply unit
- Patent number 11,500,961
- Issue date Nov 15, 2022
- Google LLC
- Andrew Everett Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Special purpose neural network training chip
- Patent number 11,275,992
- Issue date Mar 15, 2022
- Google LLC
- Thomas Norrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Modifying machine learning models to improve locality
- Patent number 11,263,529
- Issue date Mar 1, 2022
- Google LLC
- Doe Hyun Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector reductions using shared scratchpad memory
- Patent number 11,182,159
- Issue date Nov 23, 2021
- Google LLC
- Thomas Norrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit with a ring-shaped hot spot area and multidirect...
- Patent number 11,158,566
- Issue date Oct 26, 2021
- Google LLC
- Madhusudan Krishnan Iyengar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Neural network processor
- Patent number 11,049,016
- Issue date Jun 29, 2021
- Google LLC
- Jonathan Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector processing unit
- Patent number 11,016,764
- Issue date May 25, 2021
- Google LLC
- William Lacy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency matrix multiply unit
- Patent number 10,970,362
- Issue date Apr 6, 2021
- Google LLC
- Andrew Everett Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Vector processing unit
- Patent number 10,915,318
- Issue date Feb 9, 2021
- Google LLC
- William Lacy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performing matrix multiplication in hardware
- Patent number 10,831,862
- Issue date Nov 10, 2020
- Google LLC
- Andrew Everett Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Neural network processor
- Patent number 10,699,188
- Issue date Jun 30, 2020
- Google LLC
- Jonathan Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency matrix multiply unit
- Patent number 10,698,974
- Issue date Jun 30, 2020
- Google LLC
- Andrew Everett Phelps
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
PERFORMING MATRIX MULTIPLICATION IN HARDWARE
- Publication number 20240370526
- Publication date Nov 7, 2024
- Google LLC
- Andrew Everett Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY MATRIX MULTIPLY UNIT
- Publication number 20240362298
- Publication date Oct 31, 2024
- Google LLC
- Andrew Everett Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY MATRIX MULTIPLY UNIT
- Publication number 20240303297
- Publication date Sep 12, 2024
- Google LLC
- Andrew Everett Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Heterogeneous ML Accelerator Cluster with Flexible System Resource...
- Publication number 20240231667
- Publication date Jul 11, 2024
- Google LLC
- Sheng Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Modal Systolic Array For Matrix Multiplication
- Publication number 20240220202
- Publication date Jul 4, 2024
- Google LLC
- Matthew Leever Hedlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARED SCRATCHPAD MEMORY WITH PARALLEL LOAD-STORE
- Publication number 20240160909
- Publication date May 16, 2024
- Google LLC
- Thomas Norrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error Checking For Systolic Array Computation
- Publication number 20240061742
- Publication date Feb 22, 2024
- Google LLC
- Doe Hyun Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OneShot Neural Architecture and Hardware Architecture Search
- Publication number 20240037373
- Publication date Feb 1, 2024
- Google LLC
- Sheng Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR PROCESSING UNIT
- Publication number 20230297372
- Publication date Sep 21, 2023
- Google LLC
- William Lacy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hybrid and Hierarchical Multi-Trial and OneShot Neural Architecture...
- Publication number 20230297580
- Publication date Sep 21, 2023
- Google LLC
- Sheng Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY MATRIX MULTIPLY UNIT
- Publication number 20230267171
- Publication date Aug 24, 2023
- Google LLC
- Andrew Everett Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY MATRIX MULTIPLY UNIT
- Publication number 20230267172
- Publication date Aug 24, 2023
- Google LLC
- Andrew Everett Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RECOMMENDATIONS FOR SCHEDULING JOBS ON DISTRIBUTED COMPUTING DEVICES
- Publication number 20230222000
- Publication date Jul 13, 2023
- Google LLC
- Sheng Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Hardware-Aware Progressive Training Of Machine Learning Models
- Publication number 20230108177
- Publication date Apr 6, 2023
- Google LLC
- Sheng Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error Checking For Systolic Array Computation
- Publication number 20230036421
- Publication date Feb 2, 2023
- Google LLC
- Doe Hyun Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Neural Network Processor
- Publication number 20220366255
- Publication date Nov 17, 2022
- Google LLC
- Jonathan Ross
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SPECIAL PURPOSE NEURAL NETWORK TRAINING CHIP
- Publication number 20220261622
- Publication date Aug 18, 2022
- Google LLC
- Thomas Norrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Neural Architecture Scaling For Hardware Accelerators
- Publication number 20220230048
- Publication date Jul 21, 2022
- Google LLC
- Andrew Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MODIFYING MACHINE LEARNING MODELS TO IMPROVE LOCALITY
- Publication number 20220172060
- Publication date Jun 2, 2022
- Google LLC
- Doe Hyun Yoon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR REDUCTIONS USING SHARED SCRATCHPAD MEMORY
- Publication number 20220156071
- Publication date May 19, 2022
- Google LLC
- Thomas Norrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE-OPTIMIZED NEURAL ARCHITECTURE SEARCH
- Publication number 20220019869
- Publication date Jan 20, 2022
- Google LLC
- Sheng Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT WITH A RING-SHAPED HOT SPOT AREA AND MULTIDIRECT...
- Publication number 20220013435
- Publication date Jan 13, 2022
- Google LLC
- Madhusudan Krishnan Iyengar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VECTOR PROCESSING UNIT
- Publication number 20210357212
- Publication date Nov 18, 2021
- Google LLC
- William Lacy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VECTOR REDUCTIONS USING SHARED SCRATCHPAD MEMORY
- Publication number 20210263739
- Publication date Aug 26, 2021
- Google LLC
- Thomas Norrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SHARED SCRATCHPAD MEMORY WITH PARALLEL LOAD-STORE
- Publication number 20210232898
- Publication date Jul 29, 2021
- Google LLC
- Thomas Norrie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW LATENCY MATRIX MULTIPLY UNIT
- Publication number 20210209193
- Publication date Jul 8, 2021
- Google LLC
- Andrew Everett Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMING MATRIX MULTIPLICATION IN HARDWARE
- Publication number 20210124795
- Publication date Apr 29, 2021
- Google LLC
- Andrew Everett Phelps
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
JOB SCHEDULING ON DISTRIBUTED COMPUTING DEVICES
- Publication number 20210073028
- Publication date Mar 11, 2021
- Google LLC
- Sheng Li
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CROSS REPLICA REDUCTION ON NETWORKS HAVING DEGRADED NODES
- Publication number 20210049408
- Publication date Feb 18, 2021
- Google LLC
- Bjarke Hammersholt Roune
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Neural Network Processor
- Publication number 20210019618
- Publication date Jan 21, 2021
- Google LLC
- Jonathan Ross
- G06 - COMPUTING CALCULATING COUNTING

Norman P. Jouppi

Person

Patents Grantslast 30 patents

Error checking for systolic array computation

Hardware-optimized neural architecture search

Generating recommendations based on performance metrics for schedul...

Performing matrix multiplication in hardware

Low latency matrix multiply unit

Vector reductions using shared scratchpad memory

Shared scratchpad memory with parallel load-store

Modifying machine learning models to improve locality

Low latency matrix multiply unit

Error checking for systolic array computation

Cooling electronic devices in a data center

Cross replica reduction on networks having degraded nodes

Low latency matrix multiply unit

Neural network processor

Parallel processing of reduction and broadcast operations on large...

Recommendations for scheduling jobs on distributed computing devices

Vector processing unit

Error checking for systolic array computation

Low latency matrix multiply unit

Special purpose neural network training chip

Modifying machine learning models to improve locality

Vector reductions using shared scratchpad memory

Integrated circuit with a ring-shaped hot spot area and multidirect...

Neural network processor

Vector processing unit

Low latency matrix multiply unit

Vector processing unit

Performing matrix multiplication in hardware

Neural network processor

Low latency matrix multiply unit

Patents Applicationslast 30 patents

PERFORMING MATRIX MULTIPLICATION IN HARDWARE

LOW LATENCY MATRIX MULTIPLY UNIT

LOW LATENCY MATRIX MULTIPLY UNIT

Heterogeneous ML Accelerator Cluster with Flexible System Resource...

Multi-Modal Systolic Array For Matrix Multiplication

SHARED SCRATCHPAD MEMORY WITH PARALLEL LOAD-STORE

Error Checking For Systolic Array Computation

OneShot Neural Architecture and Hardware Architecture Search

VECTOR PROCESSING UNIT

Hybrid and Hierarchical Multi-Trial and OneShot Neural Architecture...

LOW LATENCY MATRIX MULTIPLY UNIT

LOW LATENCY MATRIX MULTIPLY UNIT

RECOMMENDATIONS FOR SCHEDULING JOBS ON DISTRIBUTED COMPUTING DEVICES

Hardware-Aware Progressive Training Of Machine Learning Models

Error Checking For Systolic Array Computation

Neural Network Processor

SPECIAL PURPOSE NEURAL NETWORK TRAINING CHIP

Neural Architecture Scaling For Hardware Accelerators

MODIFYING MACHINE LEARNING MODELS TO IMPROVE LOCALITY

VECTOR REDUCTIONS USING SHARED SCRATCHPAD MEMORY

HARDWARE-OPTIMIZED NEURAL ARCHITECTURE SEARCH

INTEGRATED CIRCUIT WITH A RING-SHAPED HOT SPOT AREA AND MULTIDIRECT...

VECTOR PROCESSING UNIT

VECTOR REDUCTIONS USING SHARED SCRATCHPAD MEMORY

SHARED SCRATCHPAD MEMORY WITH PARALLEL LOAD-STORE

LOW LATENCY MATRIX MULTIPLY UNIT

PERFORMING MATRIX MULTIPLICATION IN HARDWARE

JOB SCHEDULING ON DISTRIBUTED COMPUTING DEVICES

CROSS REPLICA REDUCTION ON NETWORKS HAVING DEGRADED NODES

Neural Network Processor