Olivier Rouy

Person

Aix-en-Provence, FR

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated circuit memory with column voltage holding circuit
- Patent number 5,729,162
- Issue date Mar 17, 1998
- SGS-Thomson Microelectronics S.A.
- Olivier Rouy
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit memory with column voltage holding circuit
- Patent number 5,610,860
- Issue date Mar 11, 1997
- SGS-Thomson Microelectronics S.A.
- Olivier Rouy
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with on-chip detection of bit line leaks
- Patent number 5,602,044
- Issue date Feb 11, 1997
- SGS-Thomson Microelectronics, S.A.
- Olivier Rouy
- G11 - INFORMATION STORAGE
Information Patent Grant
Matrix device with redundancy fuses for integrated memory
- Patent number 5,594,693
- Issue date Jan 14, 1997
- SGS-Thomson Microelectronics S.A.
- Olivier Rouy
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with on-chip detection of bit line leaks
- Patent number 5,539,694
- Issue date Jul 23, 1996
- SGS-Thomson Microelectronics, S.A.
- Olivier Rouy
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for checking post-erasure contents of an erasa...
- Patent number 5,483,492
- Issue date Jan 9, 1996
- SGS-Thomson Microelectronics S.A.
- Olivier Rouy
- G11 - INFORMATION STORAGE
Information Patent Grant
Device for the protection of an integrated circuit against power su...
- Patent number 5,473,496
- Issue date Dec 5, 1995
- SGS-Thomson Microelectronics, S.A.
- Olivier Rouy
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and architecture for accelerated programming of uniform data...
- Patent number 5,457,651
- Issue date Oct 10, 1995
- SGS-Thomson Microelectronics, S.A.
- Olivier Rouy
- G11 - INFORMATION STORAGE
Information Patent Grant
High voltage CMOS switching circuit
- Patent number 5,406,141
- Issue date Apr 11, 1995
- SGS-Thomson Microelectronics, S.A.
- Emilio Yero
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Structure and method for flash eprom memory erasable by sectors
- Patent number 5,384,743
- Issue date Jan 24, 1995
- SGS-Thomson Microelectronics, S.A.
- Olivier Rouy
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with on-chip detection of bit line leaks
- Patent number 5,351,214
- Issue date Sep 27, 1994
- SGS-Thomson Microelectronics, S.A.
- Olivier Rouy
- G11 - INFORMATION STORAGE

Olivier Rouy

Person

Patents Grantslast 30 patents

Integrated circuit memory with column voltage holding circuit

Integrated circuit memory with column voltage holding circuit

Memory with on-chip detection of bit line leaks

Matrix device with redundancy fuses for integrated memory

Memory with on-chip detection of bit line leaks

Method and apparatus for checking post-erasure contents of an erasa...

Device for the protection of an integrated circuit against power su...

Method and architecture for accelerated programming of uniform data...

High voltage CMOS switching circuit

Structure and method for flash eprom memory erasable by sectors

Memory with on-chip detection of bit line leaks