Oren Shlomo

Person

Nesher, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Integrated resistor network and method for fabricating the same
- Patent number 12,136,922
- Issue date Nov 5, 2024
- Infineon Technologies LLC
- Oren Shlomo
- G11 - INFORMATION STORAGE
Information Patent Grant
Multibit memory device and method of operating the same
- Patent number 12,033,703
- Issue date Jul 9, 2024
- Infineon Technologies LLC
- Oren Shlomo
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated resistor network and method for fabricating the same
- Patent number 11,855,641
- Issue date Dec 26, 2023
- Infineon Technologies LLC
- Oren Shlomo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage-glitch detection and protection circuit for secure memory d...
- Patent number 11,671,083
- Issue date Jun 6, 2023
- Infineon Technologies LLC
- Oren Shlomo
- G11 - INFORMATION STORAGE
Information Patent Grant
Dual regulation-loop ramp-controlled DC-DC converter
- Patent number 11,469,663
- Issue date Oct 11, 2022
- Infineon Technologies LLC
- Oren Shlomo
- G11 - INFORMATION STORAGE
Information Patent Grant
General-purpose analog switch with a controlled differential equali...
- Patent number 11,374,494
- Issue date Jun 28, 2022
- Infineon Technologies LLC
- Oren Shlomo
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Glitch protection system and reset scheme for secure memory devices
- Patent number 11,283,434
- Issue date Mar 22, 2022
- Infineon Technologies LLC
- Eran Geyari
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems, methods, and devices for fast wakeup of DC-DC converters i...
- Patent number 10,811,952
- Issue date Oct 20, 2020
- Cypress Semiconductor Corporation
- Oren Shlomo
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Minimizing read disturb in an array flash cell
- Patent number 7,864,588
- Issue date Jan 4, 2011
- Spansion Israel Ltd.
- Yoram Betser
- G11 - INFORMATION STORAGE
Information Patent Grant
Automated migration of analog and mixed-signal VLSI design
- Patent number 7,761,820
- Issue date Jul 20, 2010
- International Business Machines Corporation
- Israel Berger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automated migration of analog and mixed-signal VLSI design
- Patent number 7,409,651
- Issue date Aug 5, 2008
- International Business Machines Corporation
- Israel Berger
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Integrated Resistor Network and Method for Fabricating the Same
- Publication number 20240162896
- Publication date May 16, 2024
- Infineon Technologies LLC
- Oren Shlomo
- G05 - CONTROLLING REGULATING
Information Patent Application
Multibit Memory Device and Method of Operating the Same
- Publication number 20230110738
- Publication date Apr 13, 2023
- Infineon Technologies LLC
- Oren Shlomo
- G11 - INFORMATION STORAGE
Information Patent Application
Voltage-Glitch Detection and Protection Circuit for Secure Memory D...
- Publication number 20220014180
- Publication date Jan 13, 2022
- Infineon Technologies LLC
- Oren Shlomo
- G11 - INFORMATION STORAGE
Information Patent Application
Glitch Protection System and Reset Scheme for Secure Memory Devices
- Publication number 20220014181
- Publication date Jan 13, 2022
- Infineon Technologies LLC
- Eran Geyari
- G11 - INFORMATION STORAGE
Information Patent Application
Integrated Resistor Network and Method for Fabricating the Same
- Publication number 20220011801
- Publication date Jan 13, 2022
- Infineon Technologies LLC
- Oren Shlomo
- G01 - MEASURING TESTING
Information Patent Application
Dual Regulation-Loop Ramp-Controlled DC-DC Converter
- Publication number 20210281171
- Publication date Sep 9, 2021
- Infineon Technologies LLC
- Oren Shlomo
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
GENERAL-PURPOSE ANALOG SWITCH WITH A CONTROLLED DIFFERENTIAL EQUALI...
- Publication number 20200304024
- Publication date Sep 24, 2020
- CYPRESS SEMICONDUCTOR CORPORATION
- Oren Shlomo
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
SYSTEMS, METHODS, AND DEVICES FOR FAST WAKEUP OF DC-DC CONVERTERS I...
- Publication number 20200076294
- Publication date Mar 5, 2020
- CYPRESS SEMICONDUCTOR CORPORATION
- Oren Shlomo
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
Minimizing read disturb in an array flash cell
- Publication number 20090073760
- Publication date Mar 19, 2009
- Yoram Betser
- G11 - INFORMATION STORAGE
Information Patent Application
AUTOMATED MIGRATION OF ANALOG AND MIXED-SIGNAL VLSI DESIGN
- Publication number 20080109106
- Publication date May 8, 2008
- Israel Berger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Automated migration of analog and mixed-signal VLSI design
- Publication number 20070033550
- Publication date Feb 8, 2007
- International Business Machines Corporation
- Israel Berger
- G06 - COMPUTING CALCULATING COUNTING

Oren Shlomo

Person

Patents Grantslast 30 patents

Integrated resistor network and method for fabricating the same

Multibit memory device and method of operating the same

Integrated resistor network and method for fabricating the same

Voltage-glitch detection and protection circuit for secure memory d...

Dual regulation-loop ramp-controlled DC-DC converter

General-purpose analog switch with a controlled differential equali...

Glitch protection system and reset scheme for secure memory devices

Systems, methods, and devices for fast wakeup of DC-DC converters i...

Minimizing read disturb in an array flash cell

Automated migration of analog and mixed-signal VLSI design

Automated migration of analog and mixed-signal VLSI design

Patents Applicationslast 30 patents

Integrated Resistor Network and Method for Fabricating the Same

Multibit Memory Device and Method of Operating the Same

Voltage-Glitch Detection and Protection Circuit for Secure Memory D...

Glitch Protection System and Reset Scheme for Secure Memory Devices

Integrated Resistor Network and Method for Fabricating the Same

Dual Regulation-Loop Ramp-Controlled DC-DC Converter

GENERAL-PURPOSE ANALOG SWITCH WITH A CONTROLLED DIFFERENTIAL EQUALI...

SYSTEMS, METHODS, AND DEVICES FOR FAST WAKEUP OF DC-DC CONVERTERS I...

Minimizing read disturb in an array flash cell

AUTOMATED MIGRATION OF ANALOG AND MIXED-SIGNAL VLSI DESIGN

Automated migration of analog and mixed-signal VLSI design