Osamu Takahashi

Person

Round Rock, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Remote mapping of circuit speed variation due to process, voltage a...
- Patent number 11,616,841
- Issue date Mar 28, 2023
- Taiwan Semiconductor Manufacturing Company Limited
- Bogdan Tutuianu
- G01 - MEASURING TESTING
Information Patent Grant
Systems and methods for gate array with partial common inputs
- Patent number 11,055,463
- Issue date Jul 6, 2021
- Taiwan Semiconductor Manufacturing Company, Ltd
- Guru Prasad
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Electron beam lithography methods including time division multiplex...
- Patent number 9,378,926
- Issue date Jun 28, 2016
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ming-Zhang Kuo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Clock regenerator
- Patent number 9,362,899
- Issue date Jun 7, 2016
- Taiwan Semiconductor Manufacturing Co., Ltd
- Ming-Zhang Kuo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Charged particle lithography system with a long shape illumination...
- Patent number 9,202,662
- Issue date Dec 1, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jimmy Hsiao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Electron beam lithography systems and methods including time divisi...
- Patent number 8,941,085
- Issue date Jan 27, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ming-Zhang Kuo
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Pulse generator
- Patent number 8,552,785
- Issue date Oct 8, 2013
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Ming-Zhang Kuo
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method of logic circuit synthesis and design using a dynamic circui...
- Patent number 8,136,061
- Issue date Mar 13, 2012
- International Business Machines Corporation
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple uses for BIST test latches
- Patent number 8,006,153
- Issue date Aug 23, 2011
- International Business Machines Corporation
- Steven Ross Ferguson
- G01 - MEASURING TESTING
Information Patent Grant
Scan chain disable function for power saving
- Patent number 7,962,811
- Issue date Jun 14, 2011
- International Business Machines Corporation
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scannable latch
- Patent number 7,746,140
- Issue date Jun 29, 2010
- International Business Machines Corporation
- Sang Hoo Dhong
- G01 - MEASURING TESTING
Information Patent Grant
Level shifter for boosting wordline voltage and memory cell perform...
- Patent number 7,710,796
- Issue date May 4, 2010
- International Business Machines Corporation
- Scott R. Cottier
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory with combined line and word access
- Patent number 7,617,338
- Issue date Nov 10, 2009
- International Business Machines Corporation
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiple uses for BIST test latches
- Patent number 7,574,642
- Issue date Aug 11, 2009
- International Business Machines Corporation
- Steven Ross Ferguson
- G01 - MEASURING TESTING
Information Patent Grant
Methods and apparatus for reducing leakage current in a disabled SO...
- Patent number 7,444,525
- Issue date Oct 28, 2008
- Sony Computer Entertainment Inc.
- Hiroshi Yoshihara
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for wordline redundancy control of memory in a...
- Patent number 7,423,921
- Issue date Sep 9, 2008
- International Business Machines Corporation
- Toru Asano
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of logic circuit synthesis and design using a dynamic circui...
- Patent number 7,363,609
- Issue date Apr 22, 2008
- International Business Machines Corporation
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory array manufacturing defect detection system and method
- Patent number 7,318,182
- Issue date Jan 8, 2008
- International Business Machines Corporation
- Louis Bernard Bushard
- G11 - INFORMATION STORAGE
Information Patent Grant
Wire trimmed programmable logic array
- Patent number 7,225,422
- Issue date May 29, 2007
- International Business Machines Corporation
- Robert John Bucki
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for reducing power consumption associated with th...
- Patent number 7,218,152
- Issue date May 15, 2007
- Kabushiki Kaisha Toshiba
- Hiroaki Murakami
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic array latch
- Patent number 7,170,316
- Issue date Jan 30, 2007
- International Business Machines Corporation
- Sang Hoo Dhong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Scannable latch
- Patent number 7,170,328
- Issue date Jan 30, 2007
- International Business Machines Corporation
- Sang Hoo Dhong
- G01 - MEASURING TESTING
Information Patent Grant
Scan chain disable function for power saving
- Patent number 7,165,006
- Issue date Jan 16, 2007
- International Business Machines Corporation
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method of word line decoding for deep pipelined memory
- Patent number 7,139,215
- Issue date Nov 21, 2006
- International Business Machines Corporation
- Toru Asano
- G11 - INFORMATION STORAGE
Information Patent Grant
Method of address distribution time reduction for high speed memory...
- Patent number 7,113,443
- Issue date Sep 26, 2006
- International Business Machines Corporation
- Sang Hoo Dhong
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for preventing malfunction of content addressab...
- Patent number 7,085,147
- Issue date Aug 1, 2006
- Kabushiki Kaisha Toshiba
- Hiroaki Murakami
- G11 - INFORMATION STORAGE
Information Patent Grant
SOI sense amplifier with cross-coupled body terminal
- Patent number 7,053,668
- Issue date May 30, 2006
- Kabushiki Kaisha Toshiba
- Takaaki Nakazato
- G11 - INFORMATION STORAGE
Information Patent Grant
SOI sense amplifier with cross-coupled bit line structure
- Patent number 7,046,045
- Issue date May 16, 2006
- Kabushiki Kaisha Toshiba
- Takaaki Nakazato
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Systems and methods for operating logic circuits
- Patent number 7,030,658
- Issue date Apr 18, 2006
- Kabushiki Kaisha Toshiba
- Hiroaki Murakami
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Apparatus and method for precharging and discharging a domino circuit
- Patent number 6,963,227
- Issue date Nov 8, 2005
- Toshiba America Electronic Components, Inc.
- Hiroaki Murakami
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
REMOTE MAPPING OF CIRCUIT SPEED VARIATION DUE TO PROCESS, VOLTAGE A...
- Publication number 20230224365
- Publication date Jul 13, 2023
- Taiwan Semiconductor Manufacturing Company Limited
- Bogdan TUTUIANU
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
REMOTE MAPPING OF CIRCUIT SPEED VARIATION DUE TO PROCESS, VOLTAGE A...
- Publication number 20210250405
- Publication date Aug 12, 2021
- Taiwan Semiconductor Manufacturing Company Limited
- Bogdan TUTUIANU
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CLOCK REGENERATOR
- Publication number 20150171832
- Publication date Jun 18, 2015
- Taiwan Semiconductor Manufacturing Co., Ltd.
- Ming-Zhang KUO
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ELECTRON BEAM LITHOGRAPHY METHODS INCLUDING TIME DIVISION MULTIPLEX...
- Publication number 20150131077
- Publication date May 14, 2015
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Ming-Zhang Kuo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ELECTRON BEAM LITHOGRAPHY SYSTEMS AND METHODS INCLUDING TIME DIVISI...
- Publication number 20140268078
- Publication date Sep 18, 2014
- Ming-Zhang Kuo
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Charged Particle Lithography System With a Long Shape Illumination...
- Publication number 20140212815
- Publication date Jul 31, 2014
- Taiwan Semiconductor Manufacturing Company, Ltd.
- Jimmy Hsiao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
PULSE GENERATOR
- Publication number 20130113537
- Publication date May 9, 2013
- Taiwan Semiconductor Manufacturing Co., LTD
- Ming-Zhang KUO
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
LEVEL SHIFTER FOR BOOSTING WORDLINE VOLTAGE AND MEMORY CELL PERFORM...
- Publication number 20090116307
- Publication date May 7, 2009
- Scott R. Cottier
- G11 - INFORMATION STORAGE
Information Patent Application
MULTIPLE USES FOR BIST TEST LATCHES
- Publication number 20080313512
- Publication date Dec 18, 2008
- Steven Ross Ferguson
- G01 - MEASURING TESTING
Information Patent Application
METHOD OF LOGIC CIRCUIT SYNTHESIS AND DESIGN USING A DYNAMIC CIRCUI...
- Publication number 20080189670
- Publication date Aug 7, 2008
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Wordline Redundancy Control of Memory in a...
- Publication number 20080013388
- Publication date Jan 17, 2008
- IBM Corporation
- Toru Asano
- G11 - INFORMATION STORAGE
Information Patent Application
Scannable Latch
- Publication number 20070079193
- Publication date Apr 5, 2007
- Sang Hoo Dhong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Scan Chain Disable Function for Power Saving
- Publication number 20070061647
- Publication date Mar 15, 2007
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for row based power control of a microprocesso...
- Publication number 20070043895
- Publication date Feb 22, 2007
- Chad Allen Adams
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and apparatus for reducing leakage current in a disabled SO...
- Publication number 20060270173
- Publication date Nov 30, 2006
- SCEI Inc.
- Hiroshi Yoshihara
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Multiple uses for bist test latches
- Publication number 20060242519
- Publication date Oct 26, 2006
- Steven Ross Ferguson
- G01 - MEASURING TESTING
Information Patent Application
System and method for a memory with combined line and word access
- Publication number 20060179176
- Publication date Aug 10, 2006
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory array manufacturing defect detection system and method
- Publication number 20060156090
- Publication date Jul 13, 2006
- International Business Machines Corporation
- Louis Bernard Bushard
- G11 - INFORMATION STORAGE
Information Patent Application
System and method for reducing power consumption associated with th...
- Publication number 20060152247
- Publication date Jul 13, 2006
- Toshiba Am. Elec. Comp.
- Hiroaki Murakami
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Systems and methods for improving performance of a forwarding mecha...
- Publication number 20060149930
- Publication date Jul 6, 2006
- Hiroaki Murakami
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR PREVENTING MALFUNCTION OF CONTENT ADDRESSAB...
- Publication number 20060120127
- Publication date Jun 8, 2006
- Hiroaki Murakami
- G11 - INFORMATION STORAGE
Information Patent Application
Scannable latch
- Publication number 20060097766
- Publication date May 11, 2006
- International Business Machines Corporation
- Sang Hoo Dhong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Programmable logic array latch
- Publication number 20060097751
- Publication date May 11, 2006
- International Business Machines Corporation
- Sang Hoo Dhong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Apparatus and method of word line decoding for deep pipelined memory
- Publication number 20060098520
- Publication date May 11, 2006
- International Business Machines Corporation
- Toru Asano
- G11 - INFORMATION STORAGE
Information Patent Application
Method and apparatus for data distribution in a high speed processi...
- Publication number 20060101364
- Publication date May 11, 2006
- International Business Machines Corporation
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scan chain disable function for power saving
- Publication number 20060095802
- Publication date May 4, 2006
- International Business Machines Corporation
- Sang Hoo Dhong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method of address distribution time reduction for high speed memory...
- Publication number 20060083101
- Publication date Apr 20, 2006
- International Business Machines Corporation
- Sang Hoo Dhong
- G11 - INFORMATION STORAGE
Information Patent Application
SOI sense amplifier with cross-coupled body terminal
- Publication number 20050264324
- Publication date Dec 1, 2005
- Takaaki Nakazato
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SOI sense amplifier with pre-charge
- Publication number 20050264322
- Publication date Dec 1, 2005
- Takaaki Nakazato
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SOI sense amplifier with cross-coupled bit line structure
- Publication number 20050264323
- Publication date Dec 1, 2005
- Takaaki Nakazato
- H03 - BASIC ELECTRONIC CIRCUITRY

Osamu Takahashi

Person

Patents Grantslast 30 patents

Remote mapping of circuit speed variation due to process, voltage a...

Systems and methods for gate array with partial common inputs

Electron beam lithography methods including time division multiplex...

Clock regenerator

Charged particle lithography system with a long shape illumination...

Electron beam lithography systems and methods including time divisi...

Pulse generator

Method of logic circuit synthesis and design using a dynamic circui...

Multiple uses for BIST test latches

Scan chain disable function for power saving

Scannable latch

Level shifter for boosting wordline voltage and memory cell perform...

Memory with combined line and word access

Multiple uses for BIST test latches

Methods and apparatus for reducing leakage current in a disabled SO...

Method and apparatus for wordline redundancy control of memory in a...

Method of logic circuit synthesis and design using a dynamic circui...

Memory array manufacturing defect detection system and method

Wire trimmed programmable logic array

System and method for reducing power consumption associated with th...

Programmable logic array latch

Scannable latch

Scan chain disable function for power saving

Apparatus and method of word line decoding for deep pipelined memory

Method of address distribution time reduction for high speed memory...

Systems and methods for preventing malfunction of content addressab...

SOI sense amplifier with cross-coupled body terminal

SOI sense amplifier with cross-coupled bit line structure

Systems and methods for operating logic circuits

Apparatus and method for precharging and discharging a domino circuit

Patents Applicationslast 30 patents

REMOTE MAPPING OF CIRCUIT SPEED VARIATION DUE TO PROCESS, VOLTAGE A...

REMOTE MAPPING OF CIRCUIT SPEED VARIATION DUE TO PROCESS, VOLTAGE A...

CLOCK REGENERATOR

ELECTRON BEAM LITHOGRAPHY METHODS INCLUDING TIME DIVISION MULTIPLEX...

ELECTRON BEAM LITHOGRAPHY SYSTEMS AND METHODS INCLUDING TIME DIVISI...

Charged Particle Lithography System With a Long Shape Illumination...

PULSE GENERATOR

LEVEL SHIFTER FOR BOOSTING WORDLINE VOLTAGE AND MEMORY CELL PERFORM...

MULTIPLE USES FOR BIST TEST LATCHES

METHOD OF LOGIC CIRCUIT SYNTHESIS AND DESIGN USING A DYNAMIC CIRCUI...

Method and Apparatus for Wordline Redundancy Control of Memory in a...

Scannable Latch

Scan Chain Disable Function for Power Saving

Method and apparatus for row based power control of a microprocesso...

Methods and apparatus for reducing leakage current in a disabled SO...

Multiple uses for bist test latches

System and method for a memory with combined line and word access

Memory array manufacturing defect detection system and method

System and method for reducing power consumption associated with th...

Systems and methods for improving performance of a forwarding mecha...

SYSTEMS AND METHODS FOR PREVENTING MALFUNCTION OF CONTENT ADDRESSAB...

Scannable latch

Programmable logic array latch

Apparatus and method of word line decoding for deep pipelined memory

Method and apparatus for data distribution in a high speed processi...

Scan chain disable function for power saving

Method of address distribution time reduction for high speed memory...

SOI sense amplifier with cross-coupled body terminal

SOI sense amplifier with pre-charge

SOI sense amplifier with cross-coupled bit line structure