Oscar U. Ojeda

Person

Chandler, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Subtractive etch resolution implementing a functional thin metal re...
- Patent number 11,948,848
- Issue date Apr 2, 2024
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Conductive route patterning for electronic substrates
- Patent number 11,817,349
- Issue date Nov 14, 2023
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via structures having tapered profiles for embedded interconnect br...
- Patent number 11,721,631
- Issue date Aug 8, 2023
- Intel Corporation
- Jeremy D. Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via-trace structures
- Patent number 11,652,036
- Issue date May 16, 2023
- Santa Clara
- Jeremy Ecton
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method, device and system for providing etched metallization struct...
- Patent number 11,528,811
- Issue date Dec 13, 2022
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Via structures having tapered profiles for embedded interconnect br...
- Patent number 11,373,951
- Issue date Jun 28, 2022
- Intel Corporation
- Jeremy D. Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method, device and system for providing etched metallization struct...
- Patent number 11,116,084
- Issue date Sep 7, 2021
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for making a flexible wearable circuit
- Patent number 10,798,817
- Issue date Oct 6, 2020
- Intel Corporation
- Aleksandar Aleksov
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced etch anisotropy using nanoparticles as banking agents in t...
- Patent number 10,515,824
- Issue date Dec 24, 2019
- Intel Corporation
- Jeremy Ecton
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Grant
Anisotropic etching systems and methods using a photochemically enh...
- Patent number 10,438,812
- Issue date Oct 8, 2019
- Intel Corporation
- Jeremy D. Ecton
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR

Patents Applicationslast 30 patents

Information Patent Application
SELF-ALIGNED AIR GAP FORMATION IN MICROELECTRONICS PACKAGES
- Publication number 20240101413
- Publication date Mar 28, 2024
- Intel Corporation
- Jeremy D. Ecton
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
ELECTRONIC PACKAGING ARCHITECTURE WITH CUSTOMIZED VARIABLE METAL TH...
- Publication number 20230087810
- Publication date Mar 23, 2023
- Intel Corporation
- Jeremy D. ECTON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VIA STRUCTURES HAVING TAPERED PROFILES FOR EMBEDDED INTERCONNECT BR...
- Publication number 20220285278
- Publication date Sep 8, 2022
- Intel Corporation
- Jeremy D. Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTI-STEP ISOTROPIC ETCH PATTERNING OF THICK COPPER LAYERS FOR FOR...
- Publication number 20220199427
- Publication date Jun 23, 2022
- Intel Corporation
- Oladeji Fadayomi
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD, DEVICE AND SYSTEM FOR PROVIDING ETCHED METALLIZATION STRUCT...
- Publication number 20210289638
- Publication date Sep 16, 2021
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONDUCTIVE ROUTE PATTERNING FOR ELECTRONIC SUBSTRATES
- Publication number 20210280463
- Publication date Sep 9, 2021
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SUBTRACTIVE ETCH RESOLUTION IMPLEMENTING A FUNCTIONAL THIN METAL RE...
- Publication number 20200258800
- Publication date Aug 13, 2020
- Intel Corporation
- Jeremy ECTON
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METHOD, DEVICE AND SYSTEM FOR PROVIDING ETCHED METALLIZATION STRUCT...
- Publication number 20200236795
- Publication date Jul 23, 2020
- Intel Corporation
- Jeremy Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VIA STRUCTURES HAVING TAPERED PROFILES FOR EMBEDDED INTERCONNECT BR...
- Publication number 20190304912
- Publication date Oct 3, 2019
- Intel Corporation
- Jeremy D. Ecton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ALIGNMENT VIA-TRACE STRUCTURES
- Publication number 20190304890
- Publication date Oct 3, 2019
- Intel Corporation
- Jeremy Ecton
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Application
ENHANCED ETCH ANISOTROPY USING NANOPARTICLES AS BANKING AGENTS IN T...
- Publication number 20190214272
- Publication date Jul 11, 2019
- Intel Cororation
- Jeremy ECTON
- C23 - COATING METALLIC MATERIAL COATING MATERIAL WITH METALLIC MATERIAL CHEMI...
Information Patent Application
MULTI-LAYER FLEXIBLE/STRETCHABLE ELECTRONIC PACKAGE FOR ADVANCED WE...
- Publication number 20180376585
- Publication date Dec 27, 2018
- Intel Corporation
- Aleksandar Aleksov
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
ANISOTROPIC ETCHING SYSTEMS AND METHODS USING A PHOTOCHEMICALLY ENH...
- Publication number 20180286700
- Publication date Oct 4, 2018
- Intel Corporation
- Jeremy D. Ecton
- H01 - BASIC ELECTRIC ELEMENTS

Oscar U. Ojeda

Person

Patents Grantslast 30 patents

Subtractive etch resolution implementing a functional thin metal re...

Conductive route patterning for electronic substrates

Via structures having tapered profiles for embedded interconnect br...

Via-trace structures

Method, device and system for providing etched metallization struct...

Via structures having tapered profiles for embedded interconnect br...

Method, device and system for providing etched metallization struct...

Method for making a flexible wearable circuit

Enhanced etch anisotropy using nanoparticles as banking agents in t...

Anisotropic etching systems and methods using a photochemically enh...

Patents Applicationslast 30 patents

SELF-ALIGNED AIR GAP FORMATION IN MICROELECTRONICS PACKAGES

ELECTRONIC PACKAGING ARCHITECTURE WITH CUSTOMIZED VARIABLE METAL TH...

VIA STRUCTURES HAVING TAPERED PROFILES FOR EMBEDDED INTERCONNECT BR...

MULTI-STEP ISOTROPIC ETCH PATTERNING OF THICK COPPER LAYERS FOR FOR...

METHOD, DEVICE AND SYSTEM FOR PROVIDING ETCHED METALLIZATION STRUCT...

CONDUCTIVE ROUTE PATTERNING FOR ELECTRONIC SUBSTRATES

SUBTRACTIVE ETCH RESOLUTION IMPLEMENTING A FUNCTIONAL THIN METAL RE...

METHOD, DEVICE AND SYSTEM FOR PROVIDING ETCHED METALLIZATION STRUCT...

VIA STRUCTURES HAVING TAPERED PROFILES FOR EMBEDDED INTERCONNECT BR...

ALIGNMENT VIA-TRACE STRUCTURES

ENHANCED ETCH ANISOTROPY USING NANOPARTICLES AS BANKING AGENTS IN T...

MULTI-LAYER FLEXIBLE/STRETCHABLE ELECTRONIC PACKAGE FOR ADVANCED WE...

ANISOTROPIC ETCHING SYSTEMS AND METHODS USING A PHOTOCHEMICALLY ENH...