Pak Shing Chau

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Drift detection in timing signal forwarded from memory controller t...
- Patent number 11,983,031
- Issue date May 14, 2024
- RAMBUS INC.
- Jun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Drift detection in timing signal forwarded from memory controller t...
- Patent number 11,709,525
- Issue date Jul 25, 2023
- RAMBUS INC.
- Jun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Drift detection in timing signal forwarded from memory controller t...
- Patent number 11,378,998
- Issue date Jul 5, 2022
- RAMBUS INC.
- Jun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Drift detection in timing signal forwarded from memory controller t...
- Patent number 10,877,511
- Issue date Dec 29, 2020
- RAMBUS INC.
- Jun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 10,855,413
- Issue date Dec 1, 2020
- RAMBUS INC.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Drift detection in timing signal forwarded from memory controller t...
- Patent number 10,496,126
- Issue date Dec 3, 2019
- Rambus Inc.
- Jun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-PAM output driver with distortion compensation
- Patent number 9,998,305
- Issue date Jun 12, 2018
- Rambus Inc.
- Jared L. Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Drift adjustment in timing signal forwarded from memory controller...
- Patent number 9,568,942
- Issue date Feb 14, 2017
- Rambus Inc.
- Jun Kim
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Event-driven clock duty cycle control
- Patent number 9,564,885
- Issue date Feb 7, 2017
- Rambus Inc.
- Pak Shing Chau
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multiphase receiver with equalization circuitry
- Patent number 9,544,169
- Issue date Jan 10, 2017
- Rambus Inc.
- Jared L. Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 9,356,743
- Issue date May 31, 2016
- Rambus Inc.
- Jared Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Drift detection in timing signal forwarded from memory controller t...
- Patent number 9,235,537
- Issue date Jan 12, 2016
- Rambus Inc.
- Jun Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Integrated circuit comprising a delay-locked loop
- Patent number 9,160,350
- Issue date Oct 13, 2015
- Rambus Inc.
- Jared L. Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 8,812,919
- Issue date Aug 19, 2014
- Rambus Inc.
- Jared Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 8,812,918
- Issue date Aug 19, 2014
- Rambus Inc.
- Jared Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 8,756,469
- Issue date Jun 17, 2014
- Rambus Inc.
- Jared Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiphase receiver with equalization circuitry
- Patent number 8,634,452
- Issue date Jan 21, 2014
- Rambus Inc.
- Jared L. Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for adjusting the performance of a synchronous...
- Patent number 8,296,540
- Issue date Oct 23, 2012
- Rambus Inc.
- Bruno Werner Garlepp
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrating receiver with precharge circuitry
- Patent number 8,199,859
- Issue date Jun 12, 2012
- Rambus Inc.
- Jared L. Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 8,069,378
- Issue date Nov 29, 2011
- Rambus Inc.
- Jared Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for a mesochronous transmission system
- Patent number 7,978,802
- Issue date Jul 12, 2011
- Xilinx, Inc.
- Prasun K. Raha
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Memory device receiver
- Patent number 7,859,436
- Issue date Dec 28, 2010
- Rambus Inc.
- Carl Werner
- G11 - INFORMATION STORAGE
Information Patent Grant
Multiphase receiver with equalization
- Patent number 7,809,088
- Issue date Oct 5, 2010
- Rambus Inc.
- Jared L. Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Low latency multi-level communication interface
- Patent number 7,626,442
- Issue date Dec 1, 2009
- Rambus Inc.
- Jared L. Zerbe
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 7,490,275
- Issue date Feb 10, 2009
- Rambus Inc.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for calibrating a multi-level current mode dri...
- Patent number 7,456,778
- Issue date Nov 25, 2008
- Rambus Inc.
- Carl Werner
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for evaluating and optimizing a signaling system
- Patent number 7,360,127
- Issue date Apr 15, 2008
- Rambus Inc.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for adjusting the performance of a synchronous...
- Patent number 7,337,294
- Issue date Feb 26, 2008
- Rambus Inc.
- Bruno Werner Garlepp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delay locked loop circuitry for clock delay adjustment
- Patent number 7,308,065
- Issue date Dec 11, 2007
- Rambus Inc.
- Kevin S. Donnelly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low-latency equalization in multi-level, multi-line communication s...
- Patent number 7,269,212
- Issue date Sep 11, 2007
- Rambus Inc.
- Pak Shing Chau
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
DRIFT DETECTION IN TIMING SIGNAL FORWARDED FROM MEMORY CONTROLLER T...
- Publication number 20240361799
- Publication date Oct 31, 2024
- Rambus Inc.
- Jun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRIFT DETECTION IN TIMING SIGNAL FORWARDED FROM MEMORY CONTROLLER T...
- Publication number 20230409072
- Publication date Dec 21, 2023
- Rambus Inc.
- Jun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRIFT DETECTION IN TIMING SIGNAL FORWARDED FROM MEMORY CONTROLLER T...
- Publication number 20220365552
- Publication date Nov 17, 2022
- Rambus Inc.
- Jun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRIFT DETECTION IN TIMING SIGNAL FORWARDED FROM MEMORY CONTROLLER T...
- Publication number 20210173427
- Publication date Jun 10, 2021
- Rambus Inc.
- Jun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRIFT DETECTION IN TIMING SIGNAL FORWARDED FROM MEMORY CONTROLLER T...
- Publication number 20200089270
- Publication date Mar 19, 2020
- RAMBUS INC.
- Jun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DRIFT DETECTION IN TIMING SIGNAL FORWARDED FROM MEMORY CONTROLLER T...
- Publication number 20170177021
- Publication date Jun 22, 2017
- RAMBUS INC.
- Jun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus For Evaluating And Optimizing A Signaling System
- Publication number 20160352474
- Publication date Dec 1, 2016
- RAMBUS INC.
- Jared Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DRIFT DETECTION IN TIMING SIGNAL FORWARDED FROM MEMORY CONTROLLER T...
- Publication number 20160161977
- Publication date Jun 9, 2016
- RAMBUS INC.
- Jun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus For Evaluating And Optimizing A Signaling System
- Publication number 20150078426
- Publication date Mar 19, 2015
- RAMBUS INC.
- Jared Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
EVENT-DRIVEN CLOCK DUTY CYCLE CONTROL
- Publication number 20140333361
- Publication date Nov 13, 2014
- RAMBUS INC.
- Pak Shing Chau
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Multiphase Receiver with Equalization Circuitry
- Publication number 20140286389
- Publication date Sep 25, 2014
- RAMBUS INC.
- Jared L. Zerbe
- G11 - INFORMATION STORAGE
Information Patent Application
Method And Apparatus For Evaluating And Optimizing A Signaling System
- Publication number 20130272360
- Publication date Oct 17, 2013
- Jared Zerbe
- G01 - MEASURING TESTING
Information Patent Application
Method And Apparatus For Evaluating And Optimizing A Signaling System
- Publication number 20130272361
- Publication date Oct 17, 2013
- Jared Zerbe
- G01 - MEASURING TESTING
Information Patent Application
INTEGRATED CIRCUIT COMPRISING A DELAY-LOCKED LOOP
- Publication number 20130121094
- Publication date May 16, 2013
- RAMBUS INC.
- Jared L. Zerbe
- G11 - INFORMATION STORAGE
Information Patent Application
DRIFT DETECTION IN TIMING SIGNAL FORWARDED FROM MEMORY CONTROLLER T...
- Publication number 20130111256
- Publication date May 2, 2013
- RAMBUS INC.
- Jun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiphase receiver with equalization circuitry
- Publication number 20130010855
- Publication date Jan 10, 2013
- Jared L. Zerbe
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM
- Publication number 20120147986
- Publication date Jun 14, 2012
- RAMBUS INC.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATING RECEIVER WITH PRECHARGE CIRCUITRY
- Publication number 20110140741
- Publication date Jun 16, 2011
- Jared L. Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM
- Publication number 20100251040
- Publication date Sep 30, 2010
- RAMBUS INC.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low Latency Multi-Level Communication Interface
- Publication number 20100134153
- Publication date Jun 3, 2010
- Jared L. Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Memory Device Receiver
- Publication number 20090097338
- Publication date Apr 16, 2009
- Carl Werner
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR ADJUSTING THE PERFORMANCE OF A SYNCHRONOUS...
- Publication number 20080162759
- Publication date Jul 3, 2008
- RAMBUS INC.
- Bruno Werner Garlepp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM
- Publication number 20070165472
- Publication date Jul 19, 2007
- RAMBUS INC.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR ADJUSTING THE PERFORMANCE OF A SYNCHRONOUS...
- Publication number 20070083700
- Publication date Apr 12, 2007
- RAMBUS INC.
- Bruno Werner Garlepp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus For Evaluating And Optimizing A Signaling System
- Publication number 20070064510
- Publication date Mar 22, 2007
- RAMBUS INC.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM
- Publication number 20060236183
- Publication date Oct 19, 2006
- RAMBUS INC.
- Jared Zerbe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for calibrating a multi-level current mode dri...
- Publication number 20060186915
- Publication date Aug 24, 2006
- Carl Werner
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Delay locked loop circuitry for clock delay adjustment
- Publication number 20060188051
- Publication date Aug 24, 2006
- Kevin S. Donnelly
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low latency multi-level communication interface
- Publication number 20060170453
- Publication date Aug 3, 2006
- Jared L. Zerbe
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method and apparatus for calibrating a multi-level current mode driver
- Publication number 20050005179
- Publication date Jan 6, 2005
- Rambus, Inc.
- Carl Werner
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Pak Shing Chau

Person

Patents Grantslast 30 patents

Drift detection in timing signal forwarded from memory controller t...

Drift detection in timing signal forwarded from memory controller t...

Drift detection in timing signal forwarded from memory controller t...

Drift detection in timing signal forwarded from memory controller t...

Method and apparatus for evaluating and optimizing a signaling system

Drift detection in timing signal forwarded from memory controller t...

Multi-PAM output driver with distortion compensation

Drift adjustment in timing signal forwarded from memory controller...

Event-driven clock duty cycle control

Multiphase receiver with equalization circuitry

Method and apparatus for evaluating and optimizing a signaling system

Drift detection in timing signal forwarded from memory controller t...

Integrated circuit comprising a delay-locked loop

Method and apparatus for evaluating and optimizing a signaling system

Method and apparatus for evaluating and optimizing a signaling system

Method and apparatus for evaluating and optimizing a signaling system

Multiphase receiver with equalization circuitry

Method and apparatus for adjusting the performance of a synchronous...

Integrating receiver with precharge circuitry

Method and apparatus for evaluating and optimizing a signaling system

Method and apparatus for a mesochronous transmission system

Memory device receiver

Multiphase receiver with equalization

Low latency multi-level communication interface

Method and apparatus for evaluating and optimizing a signaling system

Method and apparatus for calibrating a multi-level current mode dri...

Method and apparatus for evaluating and optimizing a signaling system

Method and apparatus for adjusting the performance of a synchronous...

Delay locked loop circuitry for clock delay adjustment

Low-latency equalization in multi-level, multi-line communication s...

Patents Applicationslast 30 patents

DRIFT DETECTION IN TIMING SIGNAL FORWARDED FROM MEMORY CONTROLLER T...

DRIFT DETECTION IN TIMING SIGNAL FORWARDED FROM MEMORY CONTROLLER T...

DRIFT DETECTION IN TIMING SIGNAL FORWARDED FROM MEMORY CONTROLLER T...

DRIFT DETECTION IN TIMING SIGNAL FORWARDED FROM MEMORY CONTROLLER T...

DRIFT DETECTION IN TIMING SIGNAL FORWARDED FROM MEMORY CONTROLLER T...

DRIFT DETECTION IN TIMING SIGNAL FORWARDED FROM MEMORY CONTROLLER T...

Method And Apparatus For Evaluating And Optimizing A Signaling System

DRIFT DETECTION IN TIMING SIGNAL FORWARDED FROM MEMORY CONTROLLER T...

Method And Apparatus For Evaluating And Optimizing A Signaling System

EVENT-DRIVEN CLOCK DUTY CYCLE CONTROL

Multiphase Receiver with Equalization Circuitry

Method And Apparatus For Evaluating And Optimizing A Signaling System

Method And Apparatus For Evaluating And Optimizing A Signaling System

INTEGRATED CIRCUIT COMPRISING A DELAY-LOCKED LOOP

DRIFT DETECTION IN TIMING SIGNAL FORWARDED FROM MEMORY CONTROLLER T...

Multiphase receiver with equalization circuitry

METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM

INTEGRATING RECEIVER WITH PRECHARGE CIRCUITRY

METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM

Low Latency Multi-Level Communication Interface

Memory Device Receiver

METHOD AND APPARATUS FOR ADJUSTING THE PERFORMANCE OF A SYNCHRONOUS...

METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM

METHOD AND APPARATUS FOR ADJUSTING THE PERFORMANCE OF A SYNCHRONOUS...

Method And Apparatus For Evaluating And Optimizing A Signaling System

METHOD AND APPARATUS FOR EVALUATING AND OPTIMIZING A SIGNALING SYSTEM

Method and apparatus for calibrating a multi-level current mode dri...

Delay locked loop circuitry for clock delay adjustment

Low latency multi-level communication interface

Method and apparatus for calibrating a multi-level current mode driver