Paolo Novellini

Person

Gorgonzola, IT

People

Patents Grantslast 30 patents

Information Patent Grant
Fast clock domain crossing architecture for high frequency trading...
- Patent number 12,149,348
- Issue date Nov 19, 2024
- Xilinx, Inc.
- Paolo Novellini
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Fast line rate switching in peripheral component interconnect expre...
- Patent number 11,705,910
- Issue date Jul 18, 2023
- Xilinx, Inc.
- Paolo Novellini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for time stamping with increased accuracy
- Patent number 11,637,645
- Issue date Apr 25, 2023
- Xilinx, Inc.
- Paolo Novellini
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit for and method of processing a data stream
- Patent number 11,212,072
- Issue date Dec 28, 2021
- Xilinx, Inc.
- Paolo Novellini
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Receiver for and method of implementing a receiver in an integrated...
- Patent number 10,832,757
- Issue date Nov 10, 2020
- Xilinx, Inc.
- Paolo Novellini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low latency receiver
- Patent number 10,547,317
- Issue date Jan 28, 2020
- Xilinx, Inc.
- Paolo Novellini
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Self-measurement of phase interpolator non-linearity in a transceiver
- Patent number 10,419,203
- Issue date Sep 17, 2019
- Xilinx, Inc.
- Paolo Novellini
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit for and method of implementing a bursty clock and data reco...
- Patent number 10,348,312
- Issue date Jul 9, 2019
- Xilinx, Inc.
- Paolo Novellini
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Systems and methods for measuring latency of data buffers
- Patent number 10,291,501
- Issue date May 14, 2019
- Xilinx, Inc.
- Paolo Novellini
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Numerically controlled oscillator for fractional burst clock data r...
- Patent number 9,992,049
- Issue date Jun 5, 2018
- Xilinx, Inc.
- Paolo Novellini
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
SERDES receiver oversampling rate
- Patent number 9,378,174
- Issue date Jun 28, 2016
- Xilinx, Inc.
- Paolo Novellini
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Lane-to-lane de-skew for transmitters
- Patent number 9,331,724
- Issue date May 3, 2016
- Xilinx, Inc.
- Paolo Novellini
- G11 - INFORMATION STORAGE
Information Patent Grant
Non-disruptive eye scan for data recovery units based on oversampling
- Patent number 9,143,316
- Issue date Sep 22, 2015
- Xilinx, Inc.
- Paolo Novellini
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Data recovery unit (DRU) based on free running oversampling with ze...
- Patent number 9,130,807
- Issue date Sep 8, 2015
- Xilinx, Inc.
- Paolo Novellini
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Increasing the resolution of serial data recovery units (DRUs) base...
- Patent number 8,971,468
- Issue date Mar 3, 2015
- Xilinx, Inc.
- Paolo Novellini
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock and data recovery with infinite pull-in range
- Patent number 8,958,513
- Issue date Feb 17, 2015
- Xilinx, Inc.
- Paolo Novellini
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Distortion tolerant clock and data recovery
- Patent number 8,724,764
- Issue date May 13, 2014
- Xilinx, Inc.
- Giovanni Guasti
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Burst phase detection for phase cyclic data streams
- Patent number 8,681,919
- Issue date Mar 25, 2014
- Xilinx, Inc.
- Paolo Novellini
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase detector for bursty data streams
- Patent number 8,666,010
- Issue date Mar 4, 2014
- Xilinx, Inc.
- Paolo Novellini
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Clock generation using a fractional phase detector
- Patent number 7,917,797
- Issue date Mar 29, 2011
- Xilinx, Inc.
- Paolo Novellini
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit for programmable stepless clock shifting
- Patent number 6,995,593
- Issue date Feb 7, 2006
- Alcatel
- Silvio Cucchi
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
FAST CLOCK DOMAIN CROSSING ARCHITECTURE FOR HIGH FREQUENCY TRADING...
- Publication number 20240161188
- Publication date May 16, 2024
- Xilinx, Inc.
- Paolo NOVELLINI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAST LINE RATE SWITCHING IN PERIPHERAL COMPONENT INTERCONNECT EXPRE...
- Publication number 20230216508
- Publication date Jul 6, 2023
- Xilinx, Inc.
- Paolo NOVELLINI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LANE-TO-LANE DE-SKEW FOR TRANSMITTERS
- Publication number 20160080008
- Publication date Mar 17, 2016
- Xilinx, Inc.
- Paolo Novellini
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SERDES RECEIVER OVERSAMPLING RATE
- Publication number 20150127877
- Publication date May 7, 2015
- Xilinx, Inc.
- Paolo Novellini
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DISTORTION TOLERANT CLOCK AND DATA RECOVERY
- Publication number 20130321047
- Publication date Dec 5, 2013
- Xilinx, Inc.
- Giovanni Guasti
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Clock Generation Using a Fractional Phase Detector
- Publication number 20090289667
- Publication date Nov 26, 2009
- Xilinx, Inc.
- Paolo Novellini
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Circuit for programmable stepless clock shifting
- Publication number 20040164779
- Publication date Aug 26, 2004
- ALCATEL
- Silvio Cucchi
- G06 - COMPUTING CALCULATING COUNTING

Paolo Novellini

Person

Patents Grantslast 30 patents

Fast clock domain crossing architecture for high frequency trading...

Fast line rate switching in peripheral component interconnect expre...

Method for time stamping with increased accuracy

Circuit for and method of processing a data stream

Receiver for and method of implementing a receiver in an integrated...

Low latency receiver

Self-measurement of phase interpolator non-linearity in a transceiver

Circuit for and method of implementing a bursty clock and data reco...

Systems and methods for measuring latency of data buffers

Numerically controlled oscillator for fractional burst clock data r...

SERDES receiver oversampling rate

Lane-to-lane de-skew for transmitters

Non-disruptive eye scan for data recovery units based on oversampling

Data recovery unit (DRU) based on free running oversampling with ze...

Increasing the resolution of serial data recovery units (DRUs) base...

Clock and data recovery with infinite pull-in range

Distortion tolerant clock and data recovery

Burst phase detection for phase cyclic data streams

Phase detector for bursty data streams

Clock generation using a fractional phase detector

Circuit for programmable stepless clock shifting

Patents Applicationslast 30 patents

FAST CLOCK DOMAIN CROSSING ARCHITECTURE FOR HIGH FREQUENCY TRADING...

FAST LINE RATE SWITCHING IN PERIPHERAL COMPONENT INTERCONNECT EXPRE...

LANE-TO-LANE DE-SKEW FOR TRANSMITTERS

SERDES RECEIVER OVERSAMPLING RATE

DISTORTION TOLERANT CLOCK AND DATA RECOVERY

Clock Generation Using a Fractional Phase Detector

Circuit for programmable stepless clock shifting