Parthasarathy Rajagopalan

Person

Milpitas, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Semiconductor package having increased resistance to electrostatic...
- Patent number 8,258,016
- Issue date Sep 4, 2012
- LSI Corporation
- Choshu Ito
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor package having increased resistance to electrostatic...
- Patent number 7,498,664
- Issue date Mar 3, 2009
- LSI Corporation
- Choshu Ito
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method and apparatus for avoiding dicing chip-outs in integrated ci...
- Patent number 7,354,790
- Issue date Apr 8, 2008
- LSI Logic Corporation
- Parthasarathy Rajagopalan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Construction to improve thermal performance and reduce die backside...
- Patent number 7,145,232
- Issue date Dec 5, 2006
- LSI Logic Corporation
- Rajagopalan Parthasarathy
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
SEMICONDUCTOR PACKAGE HAVING INCREASED RESISTANCE TO ELECTROSTATIC...
- Publication number 20090104735
- Publication date Apr 23, 2009
- LSI Logic Corporation
- Choshu Ito
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor package having increased resistance to electrostatic...
- Publication number 20070132083
- Publication date Jun 14, 2007
- LSI Logic Corporation
- Choshu Ito
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated circuit package and method with an electrical component...
- Publication number 20070013068
- Publication date Jan 18, 2007
- LSI Logic Corporation
- Yogendra Ranade
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Method and apparatus for avoiding dicing chip-outs in integrated ci...
- Publication number 20060160269
- Publication date Jul 20, 2006
- LSI Logic Corporation
- Parthasarathy Rajagopalan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Construction to improve thermal performance and reduce die backside...
- Publication number 20060071327
- Publication date Apr 6, 2006
- Rajagopalan Parthasarathy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low temperature PB-free processing for semiconductor devices
- Publication number 20060043603
- Publication date Mar 2, 2006
- LSI Logic Corporation
- Yogendra Ranade
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...

Parthasarathy Rajagopalan

Person

Patents Grantslast 30 patents

Semiconductor package having increased resistance to electrostatic...

Semiconductor package having increased resistance to electrostatic...

Method and apparatus for avoiding dicing chip-outs in integrated ci...

Construction to improve thermal performance and reduce die backside...

Patents Applicationslast 30 patents

SEMICONDUCTOR PACKAGE HAVING INCREASED RESISTANCE TO ELECTROSTATIC...

Semiconductor package having increased resistance to electrostatic...

Integrated circuit package and method with an electrical component...

Method and apparatus for avoiding dicing chip-outs in integrated ci...

Construction to improve thermal performance and reduce die backside...

Low temperature PB-free processing for semiconductor devices