Parvinder Rana

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Circuits for power down leakage reduction in random-access memory
- Patent number 11,790,982
- Issue date Oct 17, 2023
- Samsung Electronics Co., Ltd.
- Ankur Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitline precharge system for a semiconductor memory device
- Patent number 11,776,623
- Issue date Oct 3, 2023
- Samsung Electronics Co., Ltd.
- Lava Kumar Pulluru
- G11 - INFORMATION STORAGE
Information Patent Grant
Bitline precharge system for a semiconductor memory device
- Patent number 11,410,720
- Issue date Aug 9, 2022
- Samsung Electronics Co., Ltd.
- Lava Kumar Pulluru
- G11 - INFORMATION STORAGE
Information Patent Grant
Level shifter circuits
- Patent number 11,290,092
- Issue date Mar 29, 2022
- Samsung Electronics Co., Ltd.
- Ankur Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Static random-access memory (SRAM) system with delay tuning and con...
- Patent number 11,017,848
- Issue date May 25, 2021
- Samsung Electronics Co., Ltd.
- Ambuj Jain
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and methods for compensating for variations in fabricatio...
- Patent number 10,998,018
- Issue date May 4, 2021
- Samsung Electronics Co., Ltd.
- Shubham Ranjan
- G11 - INFORMATION STORAGE
Information Patent Grant
Static random-access memory with virtual banking architecture, and...
- Patent number 10,803,929
- Issue date Oct 13, 2020
- Samsung Electronics Co., Ltd.
- Lava Kumar Pulluru
- G11 - INFORMATION STORAGE
Information Patent Grant
Flip-flop with single pre-charge node
- Patent number 10,715,118
- Issue date Jul 14, 2020
- Samsung Electronics Co., Ltd.
- Shyam Agarwal
- G11 - INFORMATION STORAGE
Information Patent Grant
Methods and systems for performing decoding in finFET based memories
- Patent number 10,672,443
- Issue date Jun 2, 2020
- Samsung Electronics Co., Ltd.
- Ankur Gupta
- G11 - INFORMATION STORAGE
Information Patent Grant
Static random-access memory with virtual banking architecture, and...
- Patent number 10,665,295
- Issue date May 26, 2020
- Samsung Electronics Co., Ltd.
- Lava Kumar Pulluru
- G11 - INFORMATION STORAGE
Information Patent Grant
Low voltage tolerant ultra-low power edge triggered flip-flop for s...
- Patent number 10,651,850
- Issue date May 12, 2020
- Samsung Electronics Co., Ltd.
- Sajal Mittal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Sense amplifier flip-flop and method for fixing setup time violatio...
- Patent number 10,566,959
- Issue date Feb 18, 2020
- Samsung Electronics Co., Ltd.
- Sajal Mittal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatuses to reduce power dissipation in a static ran...
- Patent number 10,522,218
- Issue date Dec 31, 2019
- Samsung Electronics Co., Ltd.
- Parvinder Kumar Rana
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory providing signal buffering scheme for array and periphery si...
- Patent number 10,304,507
- Issue date May 28, 2019
- Samsung Electronics Co., Ltd.
- Manish Chandra Joshi
- G11 - INFORMATION STORAGE
Information Patent Grant
System on-chip (SoC) device with dedicated clock generator for memo...
- Patent number 10,147,493
- Issue date Dec 4, 2018
- Samsung Electronics Co., Ltd.
- Parvinder Kumar Rana
- G11 - INFORMATION STORAGE
Information Patent Grant
Read-current and word line delay path tracking for sense amplifier...
- Patent number 9,576,621
- Issue date Feb 21, 2017
- Texas Instruments Incorporated
- Anand Seshadri
- G11 - INFORMATION STORAGE
Information Patent Grant
Automatic latch-up prevention in SRAM
- Patent number 9,496,024
- Issue date Nov 15, 2016
- Texas Instruments Incorporated
- Srinivasa Raghavan Sridhara
- G11 - INFORMATION STORAGE
Information Patent Grant
Pseudo retention till access mode enabled memory
- Patent number 9,001,570
- Issue date Apr 7, 2015
- Texas Instruments Incorporated
- Rashmi Sachan
- G11 - INFORMATION STORAGE
Information Patent Grant
High performance two-port SRAM architecture using 8T high performan...
- Patent number 8,958,254
- Issue date Feb 17, 2015
- Texas Instruments Incorporated
- Manish Chandra Joshi
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage compensated tracking circuit in SRAM
- Patent number 8,284,626
- Issue date Oct 9, 2012
- Texas Instruments Incorporated
- Ravi Shankar Prasad
- G11 - INFORMATION STORAGE
Information Patent Grant
Margin testing of static random access memory cells
- Patent number 8,228,749
- Issue date Jul 24, 2012
- Texas Instruments Incorporated
- Xiaowei Deng
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY DEVICE AND OPERATION TO REDUCE IMPACT OF PARASITIC WIRE RESI...
- Publication number 20240347104
- Publication date Oct 17, 2024
- Samsung Electronics Co., Ltd.
- Lava Kumar Pulluru
- G11 - INFORMATION STORAGE
Information Patent Application
BITLINE PRECHARGE SYSTEM FOR A SEMICONDUCTOR MEMORY DEVICE
- Publication number 20220366970
- Publication date Nov 17, 2022
- Samsung Electronics Co., Ltd.
- Lava Kumar PULLURU
- G11 - INFORMATION STORAGE
Information Patent Application
BITLINE PRECHARGE SYSTEM FOR A SEMICONDUCTOR MEMORY DEVICE
- Publication number 20220108744
- Publication date Apr 7, 2022
- Samsung Electronics Co., Ltd.
- Lava Kumar PULLURU
- G11 - INFORMATION STORAGE
Information Patent Application
LEVEL SHIFTER CIRCUITS
- Publication number 20220103163
- Publication date Mar 31, 2022
- Samsung Electronics Co., Ltd.
- Ankur GUPTA
- G11 - INFORMATION STORAGE
Information Patent Application
CIRCUITS FOR POWER DOWN LEAKAGE REDUCTION IN RANDOM-ACCESS MEMORY
- Publication number 20220028449
- Publication date Jan 27, 2022
- Samsung Electronics Co., Ltd.
- Ankur GUPTA
- G11 - INFORMATION STORAGE
Information Patent Application
STATIC RANDOM-ACCESS MEMORY (SRAM) SYSTEM WITH DELAY TUNING AND CON...
- Publication number 20210118494
- Publication date Apr 22, 2021
- Samsung Electronics Co., Ltd.
- Ambuj JAIN
- G11 - INFORMATION STORAGE
Information Patent Application
APPARATUS AND METHODS FOR COMPENSATING FOR VARIATIONS IN FABRICATIO...
- Publication number 20210110854
- Publication date Apr 15, 2021
- Samsung Electronics Co., Ltd.
- Shubham RANJAN
- G11 - INFORMATION STORAGE
Information Patent Application
STATIC RANDOM-ACCESS MEMORY WITH VIRTUAL BANKING ARCHITECTURE, AND...
- Publication number 20200251164
- Publication date Aug 6, 2020
- Samsung Electronics Co., Ltd.
- LAVA KUMAR PULLURU
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND SYSTEMS FOR PERFORMING DECODING IN FINFET BASED MEMORIES
- Publication number 20200075070
- Publication date Mar 5, 2020
- Samsung Electronics Co., Ltd.
- Ankur GUPTA
- G11 - INFORMATION STORAGE
Information Patent Application
LOW VOLTAGE TOLERANT ULTRA-LOW POWER EDGE TRIGGERED FLIP-FLOP FOR S...
- Publication number 20200067507
- Publication date Feb 27, 2020
- Samsung Electronics Co., Ltd.
- Sajal Mittal
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
D FLIP-FLOPS WITH LOW CLOCK DISSIPATION POWER
- Publication number 20200044631
- Publication date Feb 6, 2020
- Samsung Electronics Co., Ltd.
- Shyam AGARWAL
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
STATIC RANDOM-ACCESS MEMORY WITH VIRTUAL BANKING ARCHITECTURE, AND...
- Publication number 20190147944
- Publication date May 16, 2019
- Samsung Electronics Co., Ltd.
- LAVA KUMAR PULLURU
- G11 - INFORMATION STORAGE
Information Patent Application
METHODS AND APPARATUSES TO REDUCE POWER DISSIPATION IN A STATIC RAN...
- Publication number 20190147943
- Publication date May 16, 2019
- Samsung Electronics Co., Ltd.
- Parvinder Kumar RANA
- G11 - INFORMATION STORAGE
Information Patent Application
FLIP-FLOP WITH SINGLE PRE-CHARGE NODE
- Publication number 20190058461
- Publication date Feb 21, 2019
- Samsung Electronics Co., Ltd.
- Shyam AGARWAL
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY PROVIDING SIGNAL BUFFERING SCHEME FOR ARRAY AND PERIPHERY SI...
- Publication number 20180204607
- Publication date Jul 19, 2018
- Samsung Electronics Co., Ltd.
- Manish Chandra JOSHI
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM ON-CHIP (SOC) DEVICE WITH DEDICATED CLOCK GENERATOR FOR MEMO...
- Publication number 20180174657
- Publication date Jun 21, 2018
- Samsung Electronics Co., Ltd.
- Parvinder Kumar RANA
- G11 - INFORMATION STORAGE
Information Patent Application
PSEUDO RETENTION TILL ACCESS MODE ENABLED MEMORY
- Publication number 20150092475
- Publication date Apr 2, 2015
- TEXAS INSTRUMENTS INCORPORATED
- Rashmi Sachan
- G11 - INFORMATION STORAGE
Information Patent Application
Read-Current and Word Line Delay Path Tracking for Sense Amplifier...
- Publication number 20140010032
- Publication date Jan 9, 2014
- TEXAS INSTRUMENTS INCORPORATED
- Anand Seshadri
- G11 - INFORMATION STORAGE
Information Patent Application
HIGH PERFORMANCE TWO-PORT SRAM ARCHITECTURE USING 8T HIGH PERFORMAN...
- Publication number 20130215689
- Publication date Aug 22, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Manish Chandra Joshi
- G11 - INFORMATION STORAGE
Information Patent Application
Margin Testing of Static Random Access Memory Cells
- Publication number 20110299349
- Publication date Dec 8, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Xiaowei Deng
- G11 - INFORMATION STORAGE
Information Patent Application
VOLTAGE COMPENSATED TRACKING CIRCUIT IN SRAM
- Publication number 20110216618
- Publication date Sep 8, 2011
- TEXAS INSTRUMENTS INCORPORATED
- Ravi Shankar Prasad
- G11 - INFORMATION STORAGE

Parvinder Rana

Person

Patents Grantslast 30 patents

Circuits for power down leakage reduction in random-access memory

Bitline precharge system for a semiconductor memory device

Bitline precharge system for a semiconductor memory device

Level shifter circuits

Static random-access memory (SRAM) system with delay tuning and con...

Apparatus and methods for compensating for variations in fabricatio...

Static random-access memory with virtual banking architecture, and...

Flip-flop with single pre-charge node

Methods and systems for performing decoding in finFET based memories

Static random-access memory with virtual banking architecture, and...

Low voltage tolerant ultra-low power edge triggered flip-flop for s...

Sense amplifier flip-flop and method for fixing setup time violatio...

Methods and apparatuses to reduce power dissipation in a static ran...

Memory providing signal buffering scheme for array and periphery si...

System on-chip (SoC) device with dedicated clock generator for memo...

Read-current and word line delay path tracking for sense amplifier...

Automatic latch-up prevention in SRAM

Pseudo retention till access mode enabled memory

High performance two-port SRAM architecture using 8T high performan...

Voltage compensated tracking circuit in SRAM

Margin testing of static random access memory cells

Patents Applicationslast 30 patents

MEMORY DEVICE AND OPERATION TO REDUCE IMPACT OF PARASITIC WIRE RESI...

BITLINE PRECHARGE SYSTEM FOR A SEMICONDUCTOR MEMORY DEVICE

BITLINE PRECHARGE SYSTEM FOR A SEMICONDUCTOR MEMORY DEVICE

LEVEL SHIFTER CIRCUITS

CIRCUITS FOR POWER DOWN LEAKAGE REDUCTION IN RANDOM-ACCESS MEMORY

STATIC RANDOM-ACCESS MEMORY (SRAM) SYSTEM WITH DELAY TUNING AND CON...

APPARATUS AND METHODS FOR COMPENSATING FOR VARIATIONS IN FABRICATIO...

STATIC RANDOM-ACCESS MEMORY WITH VIRTUAL BANKING ARCHITECTURE, AND...

METHODS AND SYSTEMS FOR PERFORMING DECODING IN FINFET BASED MEMORIES

LOW VOLTAGE TOLERANT ULTRA-LOW POWER EDGE TRIGGERED FLIP-FLOP FOR S...

D FLIP-FLOPS WITH LOW CLOCK DISSIPATION POWER

STATIC RANDOM-ACCESS MEMORY WITH VIRTUAL BANKING ARCHITECTURE, AND...

METHODS AND APPARATUSES TO REDUCE POWER DISSIPATION IN A STATIC RAN...

FLIP-FLOP WITH SINGLE PRE-CHARGE NODE

MEMORY PROVIDING SIGNAL BUFFERING SCHEME FOR ARRAY AND PERIPHERY SI...

SYSTEM ON-CHIP (SOC) DEVICE WITH DEDICATED CLOCK GENERATOR FOR MEMO...

PSEUDO RETENTION TILL ACCESS MODE ENABLED MEMORY

Read-Current and Word Line Delay Path Tracking for Sense Amplifier...

HIGH PERFORMANCE TWO-PORT SRAM ARCHITECTURE USING 8T HIGH PERFORMAN...

Margin Testing of Static Random Access Memory Cells

VOLTAGE COMPENSATED TRACKING CIRCUIT IN SRAM