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Patrick D. Fortner
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Beaverton, OR, US
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last 30 patents
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Patent Grant
Recursive hierarchical static timing analysis
Patent number
8,701,075
Issue date
Apr 15, 2014
Synopsys, Inc.
Florentin Dartu
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Parallel parasitic processing in static timing analysis
Patent number
8,473,886
Issue date
Jun 25, 2013
Synopsys, Inc.
Subramanyam Sripada
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Recursive hierarchical static timing analysis
Patent number
8,443,328
Issue date
May 14, 2013
Synopsys, Inc.
Florentin Dartu
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Grant
Method and apparatus for generating a mesh for finite element analysis
Patent number
4,912,664
Issue date
Mar 27, 1990
Mentor Graphics Corporation
Jonathan Weiss
G06 - COMPUTING CALCULATING COUNTING
Patents Applications
last 30 patents
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Patent Application
Recursive Hierarchical Static Timing Analysis
Publication number
20130227507
Publication date
Aug 29, 2013
Synopsys, Inc.
Florentin Dartu
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
Parallel Parasitic Processing In Static Timing Analysis
Publication number
20120066656
Publication date
Mar 15, 2012
Synopsys, Inc.
Subramanyam Sripada
G06 - COMPUTING CALCULATING COUNTING
Information
Patent Application
RECURSIVE HIERARCHICAL STATIC TIMING ANALYSIS
Publication number
20110307850
Publication date
Dec 15, 2011
Synopsys, Inc.
Florentin Dartu
G06 - COMPUTING CALCULATING COUNTING