Patrick J. CROTTY

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Power management integrated circuit integrating field effect transi...
- Patent number 10,447,276
- Issue date Oct 15, 2019
- AnDAPT, Inc.
- Kapil Shankar
- G05 - CONTROLLING REGULATING
Information Patent Grant
Adaptive analog blocks with digital wrappers integrated onto progra...
- Patent number 10,425,082
- Issue date Sep 24, 2019
- AnDAPT, Inc.
- Kapil Shankar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Compensation memory (CM) for power application
- Patent number 10,396,800
- Issue date Aug 27, 2019
- AnDAPT, Inc.
- Kapil Shankar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pulse-width modulation (PWM) control loop for power application
- Patent number 10,320,391
- Issue date Jun 11, 2019
- AnDAPT, Inc.
- Kapil Shankar
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Programmable analog and digital input/output for power application
- Patent number 10,312,911
- Issue date Jun 4, 2019
- AnDAPT, Inc.
- John Birkner
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Programmable logic device with integrated high voltage power FET
- Patent number 10,291,229
- Issue date May 14, 2019
- AnDAPT, Inc.
- Kapil Shankar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for analog to digital error conversion with mu...
- Patent number 10,200,056
- Issue date Feb 5, 2019
- AnDAPT, Inc.
- Maheen Samad
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Precision modulation timer (PMT) integrated in a programmable logic...
- Patent number 10,200,040
- Issue date Feb 5, 2019
- AnDAPT, Inc.
- Patrick J. Crotty
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Noise-immune reference (NREF) integrated in a programmable logic de...
- Patent number 10,171,085
- Issue date Jan 1, 2019
- AnDAPT, Inc.
- Patrick J. Crotty
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Pulse-width modulation (PWM) control loop for power application
- Patent number 10,141,937
- Issue date Nov 27, 2018
- AnDAPT, Inc.
- Kapil Shankar
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Compensation memory (CM) for power application
- Patent number 10,135,447
- Issue date Nov 20, 2018
- AnDAPT, Inc.
- Kapil Shankar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable integrated MOSFET (SIM)
- Patent number 10,063,237
- Issue date Aug 28, 2018
- AnDAPT, Inc.
- Kapil Shankar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable analog and digital input/output for power application
- Patent number 10,003,338
- Issue date Jun 19, 2018
- AnDAPT, Inc.
- John Birkner
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for analog to digital error conversion with mu...
- Patent number 9,998,135
- Issue date Jun 12, 2018
- AnDAPT, Inc.
- Maheen Samad
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Precision modulation timer (PMT) integrated in a programmable logic...
- Patent number 9,979,395
- Issue date May 22, 2018
- AnDAPT, Inc.
- Patrick J. Crotty
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Noise-immune reference (NREF) integrated in a programmable logic de...
- Patent number 9,954,535
- Issue date Apr 24, 2018
- AnDAPT, Inc.
- Patrick J. Crotty
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Programmable logic device with integrated high voltage power FET
- Patent number 9,887,699
- Issue date Feb 6, 2018
- AnDAPT, Inc.
- Kapil Shankar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit with programmable circuitry and an embedded proc...
- Patent number 9,454,498
- Issue date Sep 27, 2016
- Xilinx, Inc.
- William E. Allaire
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit with programmable circuitry and an embedded proc...
- Patent number 8,667,192
- Issue date Mar 4, 2014
- Xilinx, Inc.
- William E. Allaire
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Reducing power consumption in a segmented memory
- Patent number 8,503,264
- Issue date Aug 6, 2013
- Xilinx, Inc.
- Sridhar Narayanan
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit with adaptive VGG setting
- Patent number 8,354,671
- Issue date Jan 15, 2013
- Xilinx, Inc.
- Hsung Jai Im
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Hybrid integrated circuit device
- Patent number 8,293,547
- Issue date Oct 23, 2012
- Xilinx, Inc.
- James Karp
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Self power down integrated circuit
- Patent number 8,261,101
- Issue date Sep 4, 2012
- Xilinx, Inc.
- Honggo Wijaya
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Method and apparatus for configuring the internal memory cells of a...
- Patent number 8,040,153
- Issue date Oct 18, 2011
- Xilinx, Inc.
- John G. O'Dwyer
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Formation of a hybrid integrated circuit device
- Patent number 7,919,845
- Issue date Apr 5, 2011
- Xilinx, Inc.
- James Karp
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Suspend mode operation for reduced power
- Patent number 7,853,811
- Issue date Dec 14, 2010
- Xilinx, Inc.
- James A. Walstrum, Jr.
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Implementation of low power standby modes for integrated circuits
- Patent number 7,498,835
- Issue date Mar 3, 2009
- Xilinx, Inc.
- Arifur Rahman
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for RC triggered electrostatic discharge power...
- Patent number 7,372,679
- Issue date May 13, 2008
- Xilinx, Inc.
- Fu-Hing Ho
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Grant
Method and apparatus for generating a phase locked spread spectrum...
- Patent number 7,254,157
- Issue date Aug 7, 2007
- Xilinx, Inc.
- Patrick J. Crotty
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configurable voltage bias circuit for controlling buffer delays
- Patent number 7,088,172
- Issue date Aug 8, 2006
- Xilinx, Inc.
- Austin H. Lesea
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
CONFIGURABLE CLOCK ENABLE AND RESET SIGNAL FOR PROGRAMMABLE LOGIC D...
- Publication number 20240184968
- Publication date Jun 6, 2024
- Lattice Semiconductor Corporation
- Satwant Singh
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE LOOK-UP TABLE SYSTEMS AND METHODS
- Publication number 20230216503
- Publication date Jul 6, 2023
- Lattice Semiconductor Corporation
- Satwant Singh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PULSE-WIDTH MODULATION (PWM) CONTROL LOOP FOR POWER APPLICATION
- Publication number 20190052272
- Publication date Feb 14, 2019
- AnDAPT, Inc.
- Kapil Shankar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMPENSATION MEMORY (CM) FOR POWER APPLICATION
- Publication number 20190052275
- Publication date Feb 14, 2019
- AnDAPT, Inc.
- Kapil SHANKAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE ANALOG AND DIGITAL INPUT/OUTPUT FOR POWER APPLICATION
- Publication number 20180269876
- Publication date Sep 20, 2018
- AnDAPT, Inc.
- John BIRKNER
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
METHOD AND APPARATUS FOR ANALOG TO DIGITAL ERROR CONVERSION WITH MU...
- Publication number 20180262202
- Publication date Sep 13, 2018
- AnDAPT, Inc.
- Maheen Samad
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PRECISION MODULATION TIMER (PMT) INTEGRATED IN A PROGRAMMABLE LOGIC...
- Publication number 20180234097
- Publication date Aug 16, 2018
- AnDAPT, Inc.
- Patrick J. CROTTY
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
NOISE-IMMUNE REFERENCE (NREF) INTEGRATED IN A PROGRAMMABLE LOGIC DE...
- Publication number 20180205381
- Publication date Jul 19, 2018
- AnDAPT, Inc.
- Patrick J. CROTTY
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROGRAMMABLE LOGIC DEVICE WITH INTEGRATED HIGH VOLTAGE POWER FET
- Publication number 20180123596
- Publication date May 3, 2018
- AnDAPT, lnc.
- Kapil SHANKAR
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
METHOD AND APPARATUS FOR ANALOG TO DIGITAL ERROR CONVERSION WITH MU...
- Publication number 20180048324
- Publication date Feb 15, 2018
- AnDAPT, Inc.
- Maheen Samad
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PULSE-WIDTH MODULATION (PWM) CONTROL LOOP FOR POWER APPLICATION
- Publication number 20180048318
- Publication date Feb 15, 2018
- AnDAPT, Inc.
- Kapil Shankar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROGRAMMABLE ANALOG AND DIGITAL INPUT/OUTPUT FOR POWER APPLICATION
- Publication number 20180026636
- Publication date Jan 25, 2018
- AnDAPT, Inc.
- John BIRKNER
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SCALABLE INTEGRATED MOSFET (SIM)
- Publication number 20180026640
- Publication date Jan 25, 2018
- AnDAPT, Inc.
- Kapil SHANKAR
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PRECISION MODULATION TIMER (PMT) INTEGRATED IN A PROGRAMMALBE LOGIC...
- Publication number 20180026637
- Publication date Jan 25, 2018
- AnDAPT, Inc.
- Patrick J. CROTTY
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
COMPENSATION MEMORY (CM) FOR POWER APPLICATION
- Publication number 20180026644
- Publication date Jan 25, 2018
- AnDAPT, Inc.
- Kapil SHANKAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NOISE-IMMUNIE REFERENCE (NREF) INTERGARED IN A PROGRAMMABLE LOGIC D...
- Publication number 20180026643
- Publication date Jan 25, 2018
- AnDAPT, Inc.
- Patrick J. CROTTY
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
POWER MANAGEMENT INTEGRATED CIRCUIT INTEGRATING FIELD EFFECT TRANSI...
- Publication number 20170115717
- Publication date Apr 27, 2017
- AnDAPT, lnc.
- Kapil SHANKAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROGRAMMABLE LOGIC DEVICE WITH INTEGRATED HIGH VOLTAGE POWER FET
- Publication number 20170117900
- Publication date Apr 27, 2017
- AnDAPT, lnc.
- Kapil SHANKAR
- H02 - GENERATION CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
Information Patent Application
ADAPTIVE ANALOG BLOCKS WITH DIGITAL WRAPPERS INTEGRATED ONTO PROGRA...
- Publication number 20170115718
- Publication date Apr 27, 2017
- AnDAPT, lnc.
- Kapil SHANKAR
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT WITH PROGRAMMABLE CIRCUITRY AND AN EMBEDDED PROC...
- Publication number 20120221833
- Publication date Aug 30, 2012
- Xilinx, Inc.
- William E. Allaire
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HYBRID INTEGRATED CIRCUIT DEVICE
- Publication number 20110147949
- Publication date Jun 23, 2011
- Xilinx, Inc.
- James Karp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Formation of a hybrid integrated circuit device
- Publication number 20090160482
- Publication date Jun 25, 2009
- Xilinx, Inc.
- James Karp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable logic device having heterogeneous programmable logic b...
- Publication number 20050231235
- Publication date Oct 20, 2005
- Xilinx, Inc.
- Patrick J. Crotty
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PROGRAMMABLE LOGIC DEVICE HAVING HETEROGENEOUS PROGRAMMABLE LOGIC B...
- Publication number 20040178818
- Publication date Sep 16, 2004
- Xilinx, Inc.
- Patrick J. Crotty
- H03 - BASIC ELECTRONIC CIRCUITRY

Patrick J. CROTTY

Person

Patents Grantslast 30 patents

Power management integrated circuit integrating field effect transi...

Adaptive analog blocks with digital wrappers integrated onto progra...

Compensation memory (CM) for power application

Pulse-width modulation (PWM) control loop for power application

Programmable analog and digital input/output for power application

Programmable logic device with integrated high voltage power FET

Method and apparatus for analog to digital error conversion with mu...

Precision modulation timer (PMT) integrated in a programmable logic...

Noise-immune reference (NREF) integrated in a programmable logic de...

Pulse-width modulation (PWM) control loop for power application

Compensation memory (CM) for power application

Scalable integrated MOSFET (SIM)

Programmable analog and digital input/output for power application

Method and apparatus for analog to digital error conversion with mu...

Precision modulation timer (PMT) integrated in a programmable logic...

Noise-immune reference (NREF) integrated in a programmable logic de...

Programmable logic device with integrated high voltage power FET

Integrated circuit with programmable circuitry and an embedded proc...

Integrated circuit with programmable circuitry and an embedded proc...

Reducing power consumption in a segmented memory

Integrated circuit with adaptive VGG setting

Hybrid integrated circuit device

Self power down integrated circuit

Method and apparatus for configuring the internal memory cells of a...

Formation of a hybrid integrated circuit device

Suspend mode operation for reduced power

Implementation of low power standby modes for integrated circuits

Method and apparatus for RC triggered electrostatic discharge power...

Method and apparatus for generating a phase locked spread spectrum...

Configurable voltage bias circuit for controlling buffer delays

Patents Applicationslast 30 patents

CONFIGURABLE CLOCK ENABLE AND RESET SIGNAL FOR PROGRAMMABLE LOGIC D...

PROGRAMMABLE LOOK-UP TABLE SYSTEMS AND METHODS

PULSE-WIDTH MODULATION (PWM) CONTROL LOOP FOR POWER APPLICATION

COMPENSATION MEMORY (CM) FOR POWER APPLICATION

PROGRAMMABLE ANALOG AND DIGITAL INPUT/OUTPUT FOR POWER APPLICATION

METHOD AND APPARATUS FOR ANALOG TO DIGITAL ERROR CONVERSION WITH MU...

PRECISION MODULATION TIMER (PMT) INTEGRATED IN A PROGRAMMABLE LOGIC...

NOISE-IMMUNE REFERENCE (NREF) INTEGRATED IN A PROGRAMMABLE LOGIC DE...

PROGRAMMABLE LOGIC DEVICE WITH INTEGRATED HIGH VOLTAGE POWER FET

METHOD AND APPARATUS FOR ANALOG TO DIGITAL ERROR CONVERSION WITH MU...

PULSE-WIDTH MODULATION (PWM) CONTROL LOOP FOR POWER APPLICATION

PROGRAMMABLE ANALOG AND DIGITAL INPUT/OUTPUT FOR POWER APPLICATION

SCALABLE INTEGRATED MOSFET (SIM)

PRECISION MODULATION TIMER (PMT) INTEGRATED IN A PROGRAMMALBE LOGIC...

COMPENSATION MEMORY (CM) FOR POWER APPLICATION

NOISE-IMMUNIE REFERENCE (NREF) INTERGARED IN A PROGRAMMABLE LOGIC D...

POWER MANAGEMENT INTEGRATED CIRCUIT INTEGRATING FIELD EFFECT TRANSI...

PROGRAMMABLE LOGIC DEVICE WITH INTEGRATED HIGH VOLTAGE POWER FET

ADAPTIVE ANALOG BLOCKS WITH DIGITAL WRAPPERS INTEGRATED ONTO PROGRA...

INTEGRATED CIRCUIT WITH PROGRAMMABLE CIRCUITRY AND AN EMBEDDED PROC...

HYBRID INTEGRATED CIRCUIT DEVICE

Formation of a hybrid integrated circuit device

Programmable logic device having heterogeneous programmable logic b...

PROGRAMMABLE LOGIC DEVICE HAVING HETEROGENEOUS PROGRAMMABLE LOGIC B...