Patrick J. Shyvers

Person

Fort Collins, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Systems and methods for continuous wordline monitoring
- Patent number 12,009,047
- Issue date Jun 11, 2024
- Advanced Micro Devices, Inc.
- Patrick James Shyvers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for multiplexer tree indexing
- Patent number 11,782,897
- Issue date Oct 10, 2023
- Advanced Micro Devices, Inc.
- Steven R. Havlir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Encoded enable clock gaters
- Patent number 11,776,599
- Issue date Oct 3, 2023
- Advanced Micro Devices, Inc.
- Patrick J. Shyvers
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for multiplexer tree indexing
- Patent number 11,308,057
- Issue date Apr 19, 2022
- Advanced Micro Devices, Inc.
- Steven R. Havlir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arrangement and thermal management of 3D stacked dies
- Patent number 11,189,540
- Issue date Nov 30, 2021
- Advanced Micro Devices, Inc.
- John Wuu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Arrangement and thermal management of 3D stacked dies
- Patent number 11,164,807
- Issue date Nov 2, 2021
- Advanced Micro Devices, Inc.
- John Wuu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Configuration of multi-die modules with through-silicon vias
- Patent number 10,509,752
- Issue date Dec 17, 2019
- Advanced Micro Devices, Inc.
- Russell Schreiber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Arrangement and thermal management of 3D stacked dies
- Patent number 10,431,517
- Issue date Oct 1, 2019
- Advanced Micro Devices, Inc.
- John Wuu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Self-gating pulsed flip-flop
- Patent number 10,333,500
- Issue date Jun 25, 2019
- Advanced Micro Devices, Inc.
- David Scott Vickers
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Memory including side-car arrays with irregular sized entries
- Patent number 10,311,191
- Issue date Jun 4, 2019
- Advanced Micro Devices, Inc.
- John J. Wuu
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Method and Apparatus for Increasing Memory Level Parallelism by Red...
- Publication number 20240202116
- Publication date Jun 20, 2024
- ADVANCED MICRO DEVICES, INC.
- Jagadish B. Kotra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEMS AND METHODS FOR CONTINUOUS WORDLINE MONITORING
- Publication number 20240112749
- Publication date Apr 4, 2024
- ADVANCED MICRO DEVICES, INC.
- Patrick James Shyvers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENCODED ENABLE CLOCK GATERS
- Publication number 20230096138
- Publication date Mar 30, 2023
- ADVANCED MICRO DEVICES, INC.
- Patrick J. Shyvers
- G11 - INFORMATION STORAGE
Information Patent Application
DETERMINISTIC MIXED LATENCY CACHE
- Publication number 20230101038
- Publication date Mar 30, 2023
- ADVANCED MICRO DEVICES, INC.
- Patrick J. Shyvers
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR MULTIPLEXER TREE INDEXING
- Publication number 20220237164
- Publication date Jul 28, 2022
- ADVANCED MICRO DEVICES, INC.
- Steven R. Havlir
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARRANGEMENT AND THERMAL MANAGEMENT OF 3D STACKED DIES
- Publication number 20220059425
- Publication date Feb 24, 2022
- ADVANCED MICRO DEVICES, INC.
- John Wuu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ARRANGEMENT AND THERMAL MANAGEMENT OF 3D STACKED DIES
- Publication number 20190393123
- Publication date Dec 26, 2019
- ADVANCED MICRO DEVICES, INC.
- John Wuu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ARRANGEMENT AND THERMAL MANAGEMENT OF 3D STACKED DIES
- Publication number 20190393124
- Publication date Dec 26, 2019
- ADVANCED MICRO DEVICES, INC.
- John Wuu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CONFIGURATION OF MULTI-DIE MODULES WITH THROUGH-SILICON VIAS
- Publication number 20190332561
- Publication date Oct 31, 2019
- ADVANCED MICRO DEVICES, INC.
- Russell Schreiber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ARRANGEMENT AND THERMAL MANAGEMENT OF 3D STACKED DIES
- Publication number 20190067152
- Publication date Feb 28, 2019
- John Wuu
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MEMORY INCLUDING SIDE-CAR ARRAYS WITH IRREGULAR SIZED ENTRIES
- Publication number 20180210994
- Publication date Jul 26, 2018
- Advanced Micro Devices, Inc.
- John J. Wuu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR MULTIPLEXER TREE INDEXING
- Publication number 20180165314
- Publication date Jun 14, 2018
- ADVANCED MICRO DEVICES, INC.
- Steven R. Havlir
- G06 - COMPUTING CALCULATING COUNTING

Patrick J. Shyvers

Person

Patents Grantslast 30 patents

Systems and methods for continuous wordline monitoring

System and method for multiplexer tree indexing

Encoded enable clock gaters

System and method for multiplexer tree indexing

Arrangement and thermal management of 3D stacked dies

Arrangement and thermal management of 3D stacked dies

Configuration of multi-die modules with through-silicon vias

Arrangement and thermal management of 3D stacked dies

Self-gating pulsed flip-flop

Memory including side-car arrays with irregular sized entries

Patents Applicationslast 30 patents

Method and Apparatus for Increasing Memory Level Parallelism by Red...

SYSTEMS AND METHODS FOR CONTINUOUS WORDLINE MONITORING

ENCODED ENABLE CLOCK GATERS

DETERMINISTIC MIXED LATENCY CACHE

SYSTEM AND METHOD FOR MULTIPLEXER TREE INDEXING

ARRANGEMENT AND THERMAL MANAGEMENT OF 3D STACKED DIES

ARRANGEMENT AND THERMAL MANAGEMENT OF 3D STACKED DIES

ARRANGEMENT AND THERMAL MANAGEMENT OF 3D STACKED DIES

CONFIGURATION OF MULTI-DIE MODULES WITH THROUGH-SILICON VIAS

ARRANGEMENT AND THERMAL MANAGEMENT OF 3D STACKED DIES

MEMORY INCLUDING SIDE-CAR ARRAYS WITH IRREGULAR SIZED ENTRIES

SYSTEM AND METHOD FOR MULTIPLEXER TREE INDEXING