Patrick Knebel

Person

Ft Collins, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Cache and method for cache bypass functionality
- Patent number 9,405,696
- Issue date Aug 2, 2016
- Hewlett Packard Enterprise Development LP
- Blaine D. Gaither
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache and method for cache bypass functionality
- Patent number 8,683,139
- Issue date Mar 25, 2014
- Hewlett-Packard Development Company, L.P.
- Blaine D. Gaither
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer workload migration using processor pooling
- Patent number 8,505,020
- Issue date Aug 6, 2013
- Hewlett-Packard Development Company, L.P.
- Christophe de Dinechin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Allocating space in dedicated cache ways
- Patent number 8,176,255
- Issue date May 8, 2012
- Hewlett-Packard Development Company, L.P.
- Patrick Knebel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Servicing memory read requests
- Patent number 8,103,837
- Issue date Jan 24, 2012
- Hewlett-Packard Development Company, L.P.
- Matthew B. Lovell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Coherency directory updating in a multiprocessor computing system
- Patent number 7,941,610
- Issue date May 10, 2011
- Hewlett-Packard Development Company, L.P.
- Erin A. Handgen
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
Performing a memory write of a data unit without changing ownership...
- Patent number 7,600,079
- Issue date Oct 6, 2009
- Hewlett-Packard Development Company, L.P.
- Blaine D. Gaither
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing two architectures in a chip
- Patent number 7,343,479
- Issue date Mar 11, 2008
- Hewlett-Packard Development Company, L.P.
- Patrick Knebel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for verifying the correctness of a processor b...
- Patent number 7,139,936
- Issue date Nov 21, 2006
- Hewlett-Packard Development Company, L.P.
- Jeremy Petsinger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and computer system for decomposing macroinstructions into m...
- Patent number 6,820,190
- Issue date Nov 16, 2004
- Hewlett-Packard Development Company, L.P.
- Patrick Knebel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for efficiently generating, storing, and consu...
- Patent number 6,807,625
- Issue date Oct 19, 2004
- Hewlett-Packard Development Company, L.P.
- Patrick Knebel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for conditionally flushing a pipeline upon a f...
- Patent number 6,745,322
- Issue date Jun 1, 2004
- Hewlett-Packard Development Company, L.P.
- Russell C Brockmann
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for emulating an instruction set extension in...
- Patent number 6,681,322
- Issue date Jan 20, 2004
- Hewlett-Packard Development Company L.P.
- Kevin David Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods and apparatus for exchanging the contents of registers
- Patent number 6,668,315
- Issue date Dec 23, 2003
- Hewlett-Packard Development Company, L.P.
- Kevin David Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for testing microarchitectural features by usi...
- Patent number 6,643,800
- Issue date Nov 4, 2003
- Hewlett-Packard Development Company, L.P.
- Kevin David Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for verifying the fine-grained correctness of...
- Patent number 6,625,759
- Issue date Sep 23, 2003
- Hewlett-Packard Development Company, L.P.
- Jeremy Petsinger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing two architectures in a chip u...
- Patent number 6,618,801
- Issue date Sep 9, 2003
- Hewlett-Packard Development Company, L.P.
- Patrick Knebel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining register dependency in multiple architecture systems
- Patent number 6,542,862
- Issue date Apr 1, 2003
- Hewlett-Packard Development Company, L.P.
- Kevin David Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Circuitry for providing external access to signals that are interna...
- Patent number 6,003,107
- Issue date Dec 14, 1999
- Hewlett-Packard Company
- Gregory L. Ranson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for on-chip debug support and performance monitor...
- Patent number 5,867,644
- Issue date Feb 2, 1999
- Hewlett-Packard Company
- Gregory L. Ranson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-level instruction cache for a computer
- Patent number 5,860,096
- Issue date Jan 12, 1999
- Hewlett-Packard Company
- Stephen R. Undy
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simultaneous execution of two memory reference instructions with on...
- Patent number 5,829,049
- Issue date Oct 27, 1998
- Hewlett-Packard Company
- William L. Walker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for operand bypassing to allow a one and one-half cycle cach...
- Patent number 5,526,500
- Issue date Jun 11, 1996
- Hewlett-Packard Company
- Darius F. Tanksalvala
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two-level TLB having the second level TLB implemented in cache tag...
- Patent number 5,412,787
- Issue date May 2, 1995
- Hewlett-Packard Company
- Mark Forsyth
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ADDRESS TRANSLATION GASKET
- Publication number 20150113245
- Publication date Apr 23, 2015
- Gregg B. Lesartre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR PROVIDING MULTIPLE SYSTEM IMAGES
- Publication number 20150039873
- Publication date Feb 5, 2015
- Gregg B. Lesartre
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE AND METHOD FOR CACHE BYPASS FUNCTIONALITY
- Publication number 20140143503
- Publication date May 22, 2014
- Hewlett-Packard Development Company, L.P.
- Blaine D. GAITHER
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTER WORKLOAD MIGRATION
- Publication number 20120054766
- Publication date Mar 1, 2012
- Christophe de Dinechin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SERVICING MEMORY READ REQUESTS
- Publication number 20100153659
- Publication date Jun 17, 2010
- Hewlett-Packard Development Company, L.P.
- Matthew B. Lovell
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALLOCATING SPACE IN DEDICATED CACHE WAYS
- Publication number 20090106494
- Publication date Apr 23, 2009
- Patrick KNEBEL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
UPDATING CACHE BITS USING HINT TRANSACTION SIGNALS
- Publication number 20090106496
- Publication date Apr 23, 2009
- Patrick KNEBEL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE AND METHOD FOR CACHE BYPASS FUNCTIONALITY
- Publication number 20080104329
- Publication date May 1, 2008
- Blaine D. Gaither
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMING A MEMORY WRITE OF A DATA UNIT WITHOUT CHANGING OWNERSHIP...
- Publication number 20080104336
- Publication date May 1, 2008
- Blaine D. Gaither
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Coherency directory updating
- Publication number 20070255906
- Publication date Nov 1, 2007
- Erin A. Handgen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for exchanging the contents of registers
- Publication number 20040068641
- Publication date Apr 8, 2004
- Kevin David Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for testing microarchitectural features by usi...
- Publication number 20040064267
- Publication date Apr 1, 2004
- Kevin David Safford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for verifying the correctness of a processor b...
- Publication number 20040039966
- Publication date Feb 26, 2004
- Jeremy Petsinger
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for implementing two architectures in a chip
- Publication number 20040030865
- Publication date Feb 12, 2004
- Patrick Knebel
- G06 - COMPUTING CALCULATING COUNTING

Patrick Knebel

Person

Patents Grantslast 30 patents

Cache and method for cache bypass functionality

Cache and method for cache bypass functionality

Computer workload migration using processor pooling

Allocating space in dedicated cache ways

Servicing memory read requests

Coherency directory updating in a multiprocessor computing system

Performing a memory write of a data unit without changing ownership...

Method and apparatus for implementing two architectures in a chip

Method and apparatus for verifying the correctness of a processor b...

Method and computer system for decomposing macroinstructions into m...

Method and apparatus for efficiently generating, storing, and consu...

Apparatus and method for conditionally flushing a pipeline upon a f...

Method and apparatus for emulating an instruction set extension in...

Methods and apparatus for exchanging the contents of registers

Method and apparatus for testing microarchitectural features by usi...

Method and apparatus for verifying the fine-grained correctness of...

Method and apparatus for implementing two architectures in a chip u...

Determining register dependency in multiple architecture systems

Circuitry for providing external access to signals that are interna...

System and method for on-chip debug support and performance monitor...

Multi-level instruction cache for a computer

Simultaneous execution of two memory reference instructions with on...

System for operand bypassing to allow a one and one-half cycle cach...

Two-level TLB having the second level TLB implemented in cache tag...

Patents Applicationslast 30 patents

ADDRESS TRANSLATION GASKET

PROCESSOR PROVIDING MULTIPLE SYSTEM IMAGES

CACHE AND METHOD FOR CACHE BYPASS FUNCTIONALITY

COMPUTER WORKLOAD MIGRATION

SERVICING MEMORY READ REQUESTS

ALLOCATING SPACE IN DEDICATED CACHE WAYS

UPDATING CACHE BITS USING HINT TRANSACTION SIGNALS

CACHE AND METHOD FOR CACHE BYPASS FUNCTIONALITY

PERFORMING A MEMORY WRITE OF A DATA UNIT WITHOUT CHANGING OWNERSHIP...

Coherency directory updating

Method and apparatus for exchanging the contents of registers

Method and apparatus for testing microarchitectural features by usi...

Method and apparatus for verifying the correctness of a processor b...

Method and apparatus for implementing two architectures in a chip