Patrick Lu

Person

Mesa, AZ, US

People

Patents Grantslast 30 patents

Information Patent Grant
Branch prediction based on coherence operations in processors
- Patent number 11,886,884
- Issue date Jan 30, 2024
- Intel Corporation
- Christopher Wilkerson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Main memory control function with prefetch intelligence
- Patent number 10,977,036
- Issue date Apr 13, 2021
- Intel Corporation
- Patrick Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic failover permissions
- Patent number 10,949,313
- Issue date Mar 16, 2021
- Intel Corporation
- Francesc Guim Bernat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuits for generating input/output latency performance...
- Patent number 10,853,283
- Issue date Dec 1, 2020
- Intel Corporation
- Garrett Matthias Drown
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Application and processor guided memory prefetching
- Patent number 10,621,097
- Issue date Apr 14, 2020
- Intel Corporation
- Karthik Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Device, system and method to access a shared memory with field-prog...
- Patent number 10,613,999
- Issue date Apr 7, 2020
- Intel Corporation
- Francesc Guim Bernat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing cache line collisions
- Patent number 10,558,574
- Issue date Feb 11, 2020
- Intel Corporation
- Abhishek Khade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch prediction based on coherence operations in processors
- Patent number 10,521,236
- Issue date Dec 31, 2019
- Intel Corporation
- Christopher Wilkerson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mapping application functional blocks to multi-core processors
- Patent number 10,354,033
- Issue date Jul 16, 2019
- Intel Corporation
- Cristian Florin Dumitrescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Persistent caching of memory-side cache content
- Patent number 10,318,417
- Issue date Jun 11, 2019
- Intel Corporation
- Patrick Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System, apparatus and method for multi-kernel performance monitorin...
- Patent number 10,241,885
- Issue date Mar 26, 2019
- Intel Corporation
- Francesc Guim Bernat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic for software hints to improve hardware prefet...
- Patent number 10,229,060
- Issue date Mar 12, 2019
- Intel Corporation
- Christopher B. Wilkerson
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
CONTROLLER FOR LOCKING OF SELECTED CACHE REGIONS
- Publication number 20210042228
- Publication date Feb 11, 2021
- Intel Corporation
- Andrew J. HERDRICH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUITS FOR GENERATING INPUT/OUTPUT LATENCY PERFORMANC...
- Publication number 20200401538
- Publication date Dec 24, 2020
- Intel Corporation
- Garrett Matthias Drown
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Branch Prediction Based On Coherence Operations In Processors
- Publication number 20200081718
- Publication date Mar 12, 2020
- Intel Corporation
- Christopher Wilkerson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLER FOR LOCKING OF SELECTED CACHE REGIONS
- Publication number 20190340123
- Publication date Nov 7, 2019
- Intel Corporation
- Andrew J. HERDRICH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BRANCH PREDICTION BASED ON COHERENCE OPERATIONS IN PROCESSORS
- Publication number 20190303162
- Publication date Oct 3, 2019
- Christopher Wilkerson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEVICE, SYSTEM AND METHOD TO ACCESS A SHARED MEMORY WITH FIELD-PROG...
- Publication number 20190220424
- Publication date Jul 18, 2019
- Intel Corporation
- Francesc Guim Bernat
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING CACHE LINE COLLISIONS
- Publication number 20190042432
- Publication date Feb 7, 2019
- Intel Corporation
- Abhishek Khade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPLICATION AND PROCESSOR GUIDED MEMORY PREFETCHING
- Publication number 20190004954
- Publication date Jan 3, 2019
- Intel Corporation
- Karthik Kumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATIC FAILOVER PERMISSIONS
- Publication number 20190004910
- Publication date Jan 3, 2019
- Intel Corporation
- Francesc Guim Bernat
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PERSISTENT CACHING OF MEMORY-SIDE CACHE CONTENT
- Publication number 20180285260
- Publication date Oct 4, 2018
- Intel Corporation
- Patrick Lu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System, Apparatus And Method For Multi-Kernel Performance Monitorin...
- Publication number 20180267878
- Publication date Sep 20, 2018
- Intel Corporation
- Francesc Guim Bernat
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Instruction and Logic for Software Hints to Improve Hardware Prefet...
- Publication number 20180157591
- Publication date Jun 7, 2018
- Intel Corporation
- Christopher B. Wilkerson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MAPPING APPLICATION FUNCTIONAL BLOCKS TO MULTI-CORE PROCESSORS
- Publication number 20180107766
- Publication date Apr 19, 2018
- Intel Corporation
- CRISTIAN FLORIN DUMITRESCU
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR PROVIDING NETWORK INTERFACE SUPPORT FOR REMOTE MEM...
- Publication number 20180089044
- Publication date Mar 29, 2018
- Francesc Guim Bernat
- G06 - COMPUTING CALCULATING COUNTING

Person

Patents Grantslast 30 patents

Branch prediction based on coherence operations in processors

Main memory control function with prefetch intelligence

Automatic failover permissions

Integrated circuits for generating input/output latency performance...

Application and processor guided memory prefetching

Device, system and method to access a shared memory with field-prog...

Reducing cache line collisions

Branch prediction based on coherence operations in processors

Mapping application functional blocks to multi-core processors

Persistent caching of memory-side cache content

System, apparatus and method for multi-kernel performance monitorin...

Instruction and logic for software hints to improve hardware prefet...

Patents Applicationslast 30 patents

CONTROLLER FOR LOCKING OF SELECTED CACHE REGIONS

INTEGRATED CIRCUITS FOR GENERATING INPUT/OUTPUT LATENCY PERFORMANC...

Branch Prediction Based On Coherence Operations In Processors

CONTROLLER FOR LOCKING OF SELECTED CACHE REGIONS

BRANCH PREDICTION BASED ON COHERENCE OPERATIONS IN PROCESSORS

DEVICE, SYSTEM AND METHOD TO ACCESS A SHARED MEMORY WITH FIELD-PROG...

REDUCING CACHE LINE COLLISIONS

APPLICATION AND PROCESSOR GUIDED MEMORY PREFETCHING

AUTOMATIC FAILOVER PERMISSIONS

PERSISTENT CACHING OF MEMORY-SIDE CACHE CONTENT

System, Apparatus And Method For Multi-Kernel Performance Monitorin...

Instruction and Logic for Software Hints to Improve Hardware Prefet...

MAPPING APPLICATION FUNCTIONAL BLOCKS TO MULTI-CORE PROCESSORS

TECHNOLOGIES FOR PROVIDING NETWORK INTERFACE SUPPORT FOR REMOTE MEM...