Patrick P. Lai

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Adaptive power down of intra-chip interconnect
- Patent number 10,852,810
- Issue date Dec 1, 2020
- Microsoft Technology Licensing, LLC
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache memory with reduced power consumption mode
- Patent number 10,591,978
- Issue date Mar 17, 2020
- Microsoft Technology Licensing, LLC
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serial tag lookup with way-prediction
- Patent number 10,565,122
- Issue date Feb 18, 2020
- Microsoft Technology Licensing, LLC
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for efficiently implementing a processor pipeline
- Patent number 10,409,763
- Issue date Sep 10, 2019
- Intel Corporation
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware apparatuses and methods to fuse instructions
- Patent number 10,324,724
- Issue date Jun 18, 2019
- Intel Corporation
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Serial lookup of tag ways
- Patent number 10,324,850
- Issue date Jun 18, 2019
- Microsoft Technology Licensing, LLC
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Power aware hash function for cache memory mapping
- Patent number 10,318,428
- Issue date Jun 11, 2019
- Microsoft Technology Licensing, LLC
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Low power multi-core coherency
- Patent number 10,303,603
- Issue date May 28, 2019
- Microsoft Technology Licensing, LLC
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Store buffer supporting direct stores to a coherence point
- Patent number 10,282,298
- Issue date May 7, 2019
- Microsoft Technology Licensing, LLC
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive power down of intra-chip interconnect
- Patent number 10,241,561
- Issue date Mar 26, 2019
- Microsoft Technology Licensing, LLC
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
N-WAY FAULT TOLERANT PROCESSING SYSTEM
- Publication number 20240320050
- Publication date Sep 26, 2024
- Patrick Pok Man Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE POWER DOWN OF INTRA-CHIP INTERCONNECT
- Publication number 20190204898
- Publication date Jul 4, 2019
- Microsoft Technology Licensing, LLC
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTIVE POWER DOWN OF INTRA-CHIP INTERCONNECT
- Publication number 20180356874
- Publication date Dec 13, 2018
- Microsoft Technology Licensing, LLC
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW POWER MULTI-CORE COHERENCY
- Publication number 20180357169
- Publication date Dec 13, 2018
- Microsoft Technology Licensing, LLC
- Patrick P. LAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STORE BUFFER SUPPORTING DIRECT STORES TO A COHERENCE POINT
- Publication number 20180357172
- Publication date Dec 13, 2018
- Microsoft Technology Licensing, LLC
- Patrick P. LAI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE MEMORY WITH REDUCED POWER CONSUMPTION MODE
- Publication number 20180348847
- Publication date Dec 6, 2018
- Microsoft Technology Licensing, LLC
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SERIAL TAG LOOKUP WITH WAY-PREDICTION
- Publication number 20180349284
- Publication date Dec 6, 2018
- Microsoft Technology Licensing, LLC
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONCURRENT CACHE MEMORY ACCESS
- Publication number 20180336143
- Publication date Nov 22, 2018
- Microsoft Technology Licensing, LLC
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
THERMAL AND RELIABILITY BASED CACHE SLICE MIGRATION
- Publication number 20180210836
- Publication date Jul 26, 2018
- Microsoft Technology Licensing, LLC
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SERIAL LOOKUP OF TAG WAYS
- Publication number 20180137054
- Publication date May 17, 2018
- Microsoft Technology Licensing, LLC
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
POWER AWARE HASH FUNCTION FOR CACHE MEMORY MAPPING
- Publication number 20180074964
- Publication date Mar 15, 2018
- Microsoft Technology Licensing, LLC
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIRECT STORE TO COHERENCE POINT
- Publication number 20180004660
- Publication date Jan 4, 2018
- Microsoft Technology Licensing, LLC
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE APPARATUSES AND METHODS TO FUSE INSTRUCTIONS
- Publication number 20170177343
- Publication date Jun 22, 2017
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION AND LOGIC TO PERFORM A FUSED SINGLE CYCLE INCREMENT-COM...
- Publication number 20160179542
- Publication date Jun 23, 2016
- Patrick P. Lai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR EFFICIENTLY IMPLEMENTING A PROCESSOR PIPELINE
- Publication number 20150378731
- Publication date Dec 31, 2015
- PATRICK P. LAI
- G06 - COMPUTING CALCULATING COUNTING

Patrick P. Lai

Person

Patents Grantslast 30 patents

Adaptive power down of intra-chip interconnect

Cache memory with reduced power consumption mode

Serial tag lookup with way-prediction

Apparatus and method for efficiently implementing a processor pipeline

Hardware apparatuses and methods to fuse instructions

Serial lookup of tag ways

Power aware hash function for cache memory mapping

Low power multi-core coherency

Store buffer supporting direct stores to a coherence point

Adaptive power down of intra-chip interconnect

Patents Applicationslast 30 patents

N-WAY FAULT TOLERANT PROCESSING SYSTEM

ADAPTIVE POWER DOWN OF INTRA-CHIP INTERCONNECT

ADAPTIVE POWER DOWN OF INTRA-CHIP INTERCONNECT

LOW POWER MULTI-CORE COHERENCY

STORE BUFFER SUPPORTING DIRECT STORES TO A COHERENCE POINT

CACHE MEMORY WITH REDUCED POWER CONSUMPTION MODE

SERIAL TAG LOOKUP WITH WAY-PREDICTION

CONCURRENT CACHE MEMORY ACCESS

THERMAL AND RELIABILITY BASED CACHE SLICE MIGRATION

SERIAL LOOKUP OF TAG WAYS

POWER AWARE HASH FUNCTION FOR CACHE MEMORY MAPPING

DIRECT STORE TO COHERENCE POINT

HARDWARE APPARATUSES AND METHODS TO FUSE INSTRUCTIONS

INSTRUCTION AND LOGIC TO PERFORM A FUSED SINGLE CYCLE INCREMENT-COM...

APPARATUS AND METHOD FOR EFFICIENTLY IMPLEMENTING A PROCESSOR PIPELINE