Patrick Scaglia

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Saratoga, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Latch inference using dataflow analysis
- Patent number 6,725,187
- Issue date Apr 20, 2004
- Cadence Design Systems, Inc.
- Szu-Tsung Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware design language for the design of integrated circuits
- Patent number 6,421,808
- Issue date Jul 16, 2002
- Cadance Design Systems, Inc.
- Patrick C. McGeer
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Latch inference using dataflow analysis
- Patent number 6,077,305
- Issue date Jun 20, 2000
- Cadence Design Systems, Inc.
- Szu-Tsung Cheng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiprocessor task scheduling system
- Patent number 4,985,831
- Issue date Jan 15, 1991
- Evans & Sutherland Computer Corp.
- Carole Dulong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Variable delay branch system
- Patent number 4,974,155
- Issue date Nov 27, 1990
- Evans & Sutherland Computer Corp.
- Carole Dulong
- G06 - COMPUTING CALCULATING COUNTING