Paul G. Y. Tsui

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Process for forming semiconductor device with thick and thin films
- Patent number 6,261,978
- Issue date Jul 17, 2001
- Motorola, Inc.
- Ping Chen
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lithographic proximity correction through subset feature modification
- Patent number 5,958,635
- Issue date Sep 28, 1999
- Motorola, Inc.
- Alfred John Reich
- G03 - PHOTOGRAPHY CINEMATOGRAPHY ELECTROGRAPHY HOLOGRAPHY
Information Patent Grant
Method for making a dual-thickness gate oxide layer using a nitride...
- Patent number 5,960,289
- Issue date Sep 28, 1999
- Motorola, Inc.
- Paul G. Y. Tsui
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making an SOI integrated circuit with ESD protection
- Patent number 5,773,326
- Issue date Jun 30, 1998
- Motorola, Inc.
- Percy V. Gilbert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor device with ESD protection
- Patent number 5,744,841
- Issue date Apr 28, 1998
- Motorola Inc.
- Percy Veryon Gilbert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for forming a semiconductor device with ESD protection
- Patent number 5,733,794
- Issue date Mar 31, 1998
- Motorola, Inc.
- Percy Veryon Gilbert
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for fabricating a MOSFET device having reduced reverse shor...
- Patent number 5,552,332
- Issue date Sep 3, 1996
- Motorola, Inc.
- Hsing-Huang Tseng
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for forming a semiconductor device having a metal-semicondu...
- Patent number 5,545,574
- Issue date Aug 13, 1996
- Motorola, Inc.
- Wei-Ming Chen
- H01 - BASIC ELECTRIC ELEMENTS

Paul G. Y. Tsui

Person

Patents Grantslast 30 patents

Process for forming semiconductor device with thick and thin films

Lithographic proximity correction through subset feature modification

Method for making a dual-thickness gate oxide layer using a nitride...

Method of making an SOI integrated circuit with ESD protection

Semiconductor device with ESD protection

Process for forming a semiconductor device with ESD protection

Process for fabricating a MOSFET device having reduced reverse shor...

Process for forming a semiconductor device having a metal-semicondu...