Paul J. Ferro

Person

South Burlington, VT, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and system for logic verification using mirror interface
- Patent number 7,729,877
- Issue date Jun 1, 2010
- International Business Machines Corporation
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for logic verification using mirror interface
- Patent number 7,353,131
- Issue date Apr 1, 2008
- International Business Machines Corporation
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for re-using system-on-chip verification software in an oper...
- Patent number 6,868,545
- Issue date Mar 15, 2005
- International Business Machines Corporation
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for logic verification using mirror interface
- Patent number 6,865,502
- Issue date Mar 8, 2005
- International Business Machines Corporation
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor-independent system-on-chip verification for embedded proc...
- Patent number 6,615,167
- Issue date Sep 2, 2003
- International Business Machines Corporation
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of developing re-usable software for efficient verification...
- Patent number 6,539,522
- Issue date Mar 25, 2003
- International Business Machines Corporation
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND SYSTEM FOR LOGIC VERIFICATION USING MIRROR INTERFACE
- Publication number 20080222583
- Publication date Sep 11, 2008
- International Business Machines Corporation
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR LOGIC VERIFICATION USING MIRROR INTERFACE
- Publication number 20070204246
- Publication date Aug 30, 2007
- International Business Machines Corporation
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR INITIALIZING MULTIPLE PROCESSORS RESIDING...
- Publication number 20060047939
- Publication date Mar 2, 2006
- International Business Machines Corporation
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for logic verification using mirror interface
- Publication number 20050144577
- Publication date Jun 30, 2005
- International Business Machines
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System for controlling external models used for verification of sys...
- Publication number 20030145290
- Publication date Jul 31, 2003
- International Business Machines Corporation
- Robert J. Devins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and system for logic verification using mirror interface
- Publication number 20020147560
- Publication date Oct 10, 2002
- International Business Machines Corporation
- Robert J. Devins
- G01 - MEASURING TESTING

Paul J. Ferro

Person

Patents Grantslast 30 patents

Method and system for logic verification using mirror interface

Method and system for logic verification using mirror interface

Method for re-using system-on-chip verification software in an oper...

Method and system for logic verification using mirror interface

Processor-independent system-on-chip verification for embedded proc...

Method of developing re-usable software for efficient verification...

Patents Applicationslast 30 patents

METHOD AND SYSTEM FOR LOGIC VERIFICATION USING MIRROR INTERFACE

METHOD AND SYSTEM FOR LOGIC VERIFICATION USING MIRROR INTERFACE

METHOD AND APPARATUS FOR INITIALIZING MULTIPLE PROCESSORS RESIDING...

Method and system for logic verification using mirror interface

System for controlling external models used for verification of sys...

Method and system for logic verification using mirror interface