Paul Jordan

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Non-uniform memory interleaving processor
- Patent number 12,147,339
- Issue date Nov 19, 2024
- SambaNova Systems, Inc.
- Paul Jordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-uniform memory interleave method
- Patent number 12,079,124
- Issue date Sep 3, 2024
- SambaNova Systems, Inc.
- Paul J. Jordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for migrating CPU state from an inoperable core to a spare core
- Patent number 11,709,742
- Issue date Jul 25, 2023
- Oracle International Corporation
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for migrating CPU state from an inoperable core to a spare core
- Patent number 11,263,012
- Issue date Mar 1, 2022
- Oracle International Corporation
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware mechanism to mitigate stalling of a processor core
- Patent number 10,740,102
- Issue date Aug 11, 2020
- Oracle International Corporation
- Munsefar Khaleque
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for migrating CPU state from an inoperable core to a spare core
- Patent number 10,528,351
- Issue date Jan 7, 2020
- Oracle International Corporation
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Storage, access, and management of random numbers generated by a ce...
- Patent number 9,971,565
- Issue date May 15, 2018
- Oracle International Corporation
- John Pape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Load-monitor mwait
- Patent number 9,940,132
- Issue date Apr 10, 2018
- Oracle International Corporation
- Paul N. Loewenstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for migrating CPU state from an inoperable core to a spare core
- Patent number 9,710,273
- Issue date Jul 18, 2017
- Oracle International Corporation
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Precise excecution of versioned store instructions
- Patent number 9,672,298
- Issue date Jun 6, 2017
- Oracle International Corporation
- Zoran Radovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mechanism for handling unfused multiply-accumulate accrued exceptio...
- Patent number 9,507,656
- Issue date Nov 29, 2016
- Oracle America, Inc.
- Jeffrey S. Brooks
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for using unused bits in a memory pointer
- Patent number 8,732,430
- Issue date May 20, 2014
- Oracle International Corporation
- Zoran Radovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor and method providing instruction support for instructions...
- Patent number 8,555,038
- Issue date Oct 8, 2013
- Oracle International Corporation
- Christopher H. Olson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor operating mode for mitigating dependency conditions betwe...
- Patent number 8,504,805
- Issue date Aug 6, 2013
- Oracle America, Inc.
- Robert T. Golla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register error correction of speculative data in an out-of-order pr...
- Patent number 8,468,425
- Issue date Jun 18, 2013
- Oracle International Corporation
- Paul J. Jordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor and method for implementing instruction support for multi...
- Patent number 8,438,208
- Issue date May 7, 2013
- Oracle America, Inc.
- Christopher H. Olson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dynamic tag allocation in a multithreaded out-of-order processor
- Patent number 8,429,386
- Issue date Apr 23, 2013
- Oracle America, Inc.
- Paul J. Jordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method to invalidate obsolete address translations
- Patent number 8,412,911
- Issue date Apr 2, 2013
- Oracle America, Inc.
- Gregory F. Grohoski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method to manage address translation requests
- Patent number 8,301,865
- Issue date Oct 30, 2012
- Oracle America, Inc.
- Gregory F. Grohoski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
APIC implementation for a highly-threaded x86 processor
- Patent number 8,190,864
- Issue date May 29, 2012
- Oracle America, Inc.
- Paul J. Jordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch misprediction recovery mechanism for microprocessors
- Patent number 8,099,586
- Issue date Jan 17, 2012
- Oracle America, Inc.
- Yuan C. Chou
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register error correction of speculative data in an out-of-order pr...
- Patent number 8,078,942
- Issue date Dec 13, 2011
- Oracle America, Inc.
- Paul J. Jordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Minimizing TLB comparison size
- Patent number 7,937,556
- Issue date May 3, 2011
- Oracle America, Inc.
- Paul J. Jordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Delay slot handling in a processor
- Patent number 7,861,063
- Issue date Dec 28, 2010
- Oracle America, Inc.
- Robert T. Golla
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for precisely identifying effective addresses...
- Patent number 7,779,238
- Issue date Aug 17, 2010
- Oracle America, Inc.
- Nicolai Kosche
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performance instrumentation in a fine grain multithreaded multicore...
- Patent number 7,702,887
- Issue date Apr 20, 2010
- Sun Microsystems, Inc.
- Gregory F. Grohoski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single bit control of threads in a multithreaded multicore processor
- Patent number 7,676,655
- Issue date Mar 9, 2010
- Sun Microsystems, Inc.
- Paul J. Jordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimizing hardware TLB reload performance in a highly-threaded pro...
- Patent number 7,543,132
- Issue date Jun 2, 2009
- Sun Microsystems, Inc.
- Greg F. Grohoski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Real-time address trace generation
- Patent number 7,454,666
- Issue date Nov 18, 2008
- Sun Microsystems, Inc.
- Paul J. Jordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multithreaded processor having a source processor core to subsequen...
- Patent number 7,454,590
- Issue date Nov 18, 2008
- Sun Microsystems, Inc.
- Paul J. Jordan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Fully Scannable Memory Arrays
- Publication number 20240412797
- Publication date Dec 12, 2024
- SambaNova Systems, Inc.
- Thomas A. ZIAJA
- G11 - INFORMATION STORAGE
Information Patent Application
Method for Scanning a Memory Array
- Publication number 20240412798
- Publication date Dec 12, 2024
- SambaNova Systems, Inc.
- Thomas ZIAJA
- G11 - INFORMATION STORAGE
Information Patent Application
Failure Recovery In A Distributed Coarse Grained Reconfigurable Arc...
- Publication number 20240385921
- Publication date Nov 21, 2024
- SambaNova Systems, Inc.
- Paul JORDAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Switches With A Watchdog Timer For Use In An Internal Network Of A...
- Publication number 20240388519
- Publication date Nov 21, 2024
- SambaNova Systems, Inc.
- Paul JORDAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Network Health Monitor Within A Coarse Grained Reconfigurable Archi...
- Publication number 20240388493
- Publication date Nov 21, 2024
- SambaNova Systems, Inc.
- Paul JORDAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Hang Detection In A Coarse Grained Reconfigurable Architecture Proc...
- Publication number 20240385920
- Publication date Nov 21, 2024
- SambaNova Systems, Inc.
- Paul JORDAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PEER-TO-PEER ROUTE THROUGH IN A RECONFIGURABLE COMPUTING SYSTEM
- Publication number 20240020261
- Publication date Jan 18, 2024
- SambaNova Systems, Inc.
- Paul JORDAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE
- Publication number 20230418715
- Publication date Dec 28, 2023
- Oracle International Corpoation
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-UNIFORM MEMORY INTERLEAVING PROCESSOR
- Publication number 20230315624
- Publication date Oct 5, 2023
- SambaNova Systems, Inc.
- Paul JORDAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable Access to a Multi-Die Reconfigurable Processor by a Vi...
- Publication number 20230305881
- Publication date Sep 28, 2023
- SambaNova Systems, Inc.
- Manish K. SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Handling Interrupts from a Virtual Function in a System with a Reco...
- Publication number 20230244462
- Publication date Aug 3, 2023
- SambaNova Systems, Inc.
- Manish K. SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Handling Interrupts from a Virtual Function in a System with a Mult...
- Publication number 20230244515
- Publication date Aug 3, 2023
- SambaNova Systems, Inc.
- Manish K. SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Configurable Access to a Reconfigurable Processor by a Virtual Func...
- Publication number 20230244461
- Publication date Aug 3, 2023
- SambaNova Systems, Inc.
- Manish K. SHAH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NON-UNIFORM MEMORY INTERLEAVE METHOD
- Publication number 20230195620
- Publication date Jun 22, 2023
- SambaNova Systems, Inc.
- Paul J. JORDAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE
- Publication number 20220156075
- Publication date May 19, 2022
- ORACLE INTERNATIONAL CORPORATION
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE
- Publication number 20200210185
- Publication date Jul 2, 2020
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE MECHANISM TO MITIGATE STALLING OF A PROCESSOR CORE
- Publication number 20180246720
- Publication date Aug 30, 2018
- Munsefar Khaleque
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE
- Publication number 20170293539
- Publication date Oct 12, 2017
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
RANDOM NUMBER STORAGE, ACCESS, AND MANAGEMENT
- Publication number 20160328209
- Publication date Nov 10, 2016
- ORACLE INTERNATIONAL CORPORATION
- John Pape
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE
- Publication number 20160147534
- Publication date May 26, 2016
- James Lewis
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOAD-MONITOR MWAIT
- Publication number 20160098274
- Publication date Apr 7, 2016
- Oracle International Corporation
- Paul N. Loewenstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PRECISE EXCECUTION OF VERSIONED STORE INSTRUCTIONS
- Publication number 20150317338
- Publication date Nov 5, 2015
- ORACLE INTERNATIONAL CORPORATION
- Zoran Radovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOAD-MONITOR MWAIT
- Publication number 20140075163
- Publication date Mar 13, 2014
- Paul N. Loewenstein
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MITIGATION OF THREAD HOGS ON A THREADED PROCESSOR USING A GENERAL L...
- Publication number 20130297910
- Publication date Nov 7, 2013
- Jared C. Smolens
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR USING UNUSED BITS IN A MEMORY POINTER
- Publication number 20120246437
- Publication date Sep 27, 2012
- Oracle International Corporation
- Zoran Radovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Register Error Correction of Speculative Data in an Out-of-Order Pr...
- Publication number 20120060057
- Publication date Mar 8, 2012
- Paul J. Jordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR AND METHOD PROVIDING INSTRUCTION SUPPORT FOR INSTRUCTIONS...
- Publication number 20110296142
- Publication date Dec 1, 2011
- Christopher H. Olson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DYNAMIC TAG ALLOCATION IN A MULTITHREADED OUT-OF-ORDER PROCESSOR
- Publication number 20100333098
- Publication date Dec 30, 2010
- Paul J. Jordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method to Manage Address Translation Requests
- Publication number 20100332787
- Publication date Dec 30, 2010
- Gregory F. Grohoski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method to Invalidate Obsolete Address Translations
- Publication number 20100332786
- Publication date Dec 30, 2010
- Gregory F. Grohoski
- G06 - COMPUTING CALCULATING COUNTING

Paul Jordan

Person

Patents Grantslast 30 patents

Non-uniform memory interleaving processor

Non-uniform memory interleave method

Method for migrating CPU state from an inoperable core to a spare core

Method for migrating CPU state from an inoperable core to a spare core

Hardware mechanism to mitigate stalling of a processor core

Method for migrating CPU state from an inoperable core to a spare core

Storage, access, and management of random numbers generated by a ce...

Load-monitor mwait

Method for migrating CPU state from an inoperable core to a spare core

Precise excecution of versioned store instructions

Mechanism for handling unfused multiply-accumulate accrued exceptio...

Method and apparatus for using unused bits in a memory pointer

Processor and method providing instruction support for instructions...

Processor operating mode for mitigating dependency conditions betwe...

Register error correction of speculative data in an out-of-order pr...

Processor and method for implementing instruction support for multi...

Dynamic tag allocation in a multithreaded out-of-order processor

System and method to invalidate obsolete address translations

System and method to manage address translation requests

APIC implementation for a highly-threaded x86 processor

Branch misprediction recovery mechanism for microprocessors

Register error correction of speculative data in an out-of-order pr...

Minimizing TLB comparison size

Delay slot handling in a processor

Method and apparatus for precisely identifying effective addresses...

Performance instrumentation in a fine grain multithreaded multicore...

Single bit control of threads in a multithreaded multicore processor

Optimizing hardware TLB reload performance in a highly-threaded pro...

Real-time address trace generation

Multithreaded processor having a source processor core to subsequen...

Patents Applicationslast 30 patents

Fully Scannable Memory Arrays

Method for Scanning a Memory Array

Failure Recovery In A Distributed Coarse Grained Reconfigurable Arc...

Switches With A Watchdog Timer For Use In An Internal Network Of A...

Network Health Monitor Within A Coarse Grained Reconfigurable Archi...

Hang Detection In A Coarse Grained Reconfigurable Architecture Proc...

PEER-TO-PEER ROUTE THROUGH IN A RECONFIGURABLE COMPUTING SYSTEM

METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE

NON-UNIFORM MEMORY INTERLEAVING PROCESSOR

Configurable Access to a Multi-Die Reconfigurable Processor by a Vi...

Handling Interrupts from a Virtual Function in a System with a Reco...

Handling Interrupts from a Virtual Function in a System with a Mult...

Configurable Access to a Reconfigurable Processor by a Virtual Func...

NON-UNIFORM MEMORY INTERLEAVE METHOD

METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE

METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE

HARDWARE MECHANISM TO MITIGATE STALLING OF A PROCESSOR CORE

METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE

RANDOM NUMBER STORAGE, ACCESS, AND MANAGEMENT

METHOD FOR MIGRATING CPU STATE FROM AN INOPERABLE CORE TO A SPARE CORE

LOAD-MONITOR MWAIT

PRECISE EXCECUTION OF VERSIONED STORE INSTRUCTIONS

LOAD-MONITOR MWAIT

MITIGATION OF THREAD HOGS ON A THREADED PROCESSOR USING A GENERAL L...

METHOD AND APPARATUS FOR USING UNUSED BITS IN A MEMORY POINTER

Register Error Correction of Speculative Data in an Out-of-Order Pr...

PROCESSOR AND METHOD PROVIDING INSTRUCTION SUPPORT FOR INSTRUCTIONS...

DYNAMIC TAG ALLOCATION IN A MULTITHREADED OUT-OF-ORDER PROCESSOR

System and Method to Manage Address Translation Requests

System and Method to Invalidate Obsolete Address Translations