Paul Kim

Person

Fremont, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Efficient work unit processing in a multicore system
- Patent number 11,829,295
- Issue date Nov 28, 2023
- Microsoft Technology Licensing, LLC
- Wael Noureddine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient work unit processing in a multicore system
- Patent number 11,734,179
- Issue date Aug 22, 2023
- Fungible, Inc.
- Wael Noureddine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient packet queueing for computer networks
- Patent number 11,552,907
- Issue date Jan 10, 2023
- Fungible, Inc.
- Paul Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Access node for data centers
- Patent number 11,546,189
- Issue date Jan 3, 2023
- Fungible, Inc.
- Pradeep Sindhu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient work unit processing in a multicore system
- Patent number 11,048,634
- Issue date Jun 29, 2021
- Fungible, Inc.
- Wael Noureddine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Access node integrated circuit for data centers which includes a ne...
- Patent number 10,659,254
- Issue date May 19, 2020
- Fungible, Inc.
- Pradeep Sindhu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scalable ingress arbitration for merging control and payload
- Patent number 10,554,572
- Issue date Feb 4, 2020
- Innovium, Inc.
- William Brad Matthews
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Efficient work unit processing in a multicore system
- Patent number 10,540,288
- Issue date Jan 21, 2020
- Fungible, Inc.
- Wael Noureddine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuits having expandable processor memory
- Patent number 10,509,757
- Issue date Dec 17, 2019
- Altera Corporation
- Paul Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient traffic management
- Patent number 10,432,429
- Issue date Oct 1, 2019
- Innovium, Inc.
- William Brad Matthews
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Buffer allocation and memory management
- Patent number 10,303,375
- Issue date May 28, 2019
- Fungible, Inc.
- Deepak Goel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Buffer allocation and memory management using mapping table
- Patent number 10,209,900
- Issue date Feb 19, 2019
- Fungible, Inc.
- Deepak Goel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Two stage bloom filter for longest prefix match
- Patent number 10,158,571
- Issue date Dec 18, 2018
- Juniper Networks, Inc.
- Deepak Goel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Forwarding packets using a probabilistic filter and a grouping tech...
- Patent number 9,979,650
- Issue date May 22, 2018
- Juniper Networks, Inc.
- NischalKumar N. Sheth
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Two stage bloom filter for longest prefix match
- Patent number 9,596,181
- Issue date Mar 14, 2017
- Juniper Networks, Inc.
- Deepak Goel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Network packet steering via configurable association of packet proc...
- Patent number 9,215,178
- Issue date Dec 15, 2015
- Cisco Technology, Inc.
- Sachin Desai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Identifying unallocated memory segments
- Patent number 8,954,691
- Issue date Feb 10, 2015
- Juniper Networks, Inc.
- Robert Rhoades
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Network packet steering via configurable association of packet proc...
- Patent number 8,638,802
- Issue date Jan 28, 2014
- Cisco Technology, Inc.
- Sachin Desai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Transmit-buffer management for priority-based flow control
- Patent number 8,520,522
- Issue date Aug 27, 2013
- Juniper Networks, Inc.
- Gary Goldman
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Identifying unallocated memory segments
- Patent number 8,392,672
- Issue date Mar 5, 2013
- Juniper Networks, Inc.
- Robert Rhoades
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Network packet steering via configurable association of processing...
- Patent number 8,306,040
- Issue date Nov 6, 2012
- Fortinet, Inc.
- Sachin Desai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Network packet steering via configurable association of processing...
- Patent number 8,068,503
- Issue date Nov 29, 2011
- Fortinet, Inc.
- Sachin Desai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method for operating low power programmable processor
- Patent number 7,969,446
- Issue date Jun 28, 2011
- NVIDIA Corporation
- Edward A. Hutchins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for pixel data row forwarding in a 3-D graphics p...
- Patent number 7,868,902
- Issue date Jan 11, 2011
- NVIDIA Corporation
- Edward A. Hutchins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for a universal data write unit in a 3-D graphics...
- Patent number 7,724,263
- Issue date May 25, 2010
- NVIDIA Corporation
- Edward A. Hutchins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Network packet steering
- Patent number 7,203,192
- Issue date Apr 10, 2007
- Fortinet, Inc.
- Sachin Desai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low power programmable processor
- Patent number 7,091,982
- Issue date Aug 15, 2006
- NVIDIA Corporation
- Edward A. Hutchins
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
EFFICIENT WORK UNIT PROCESSING IN A MULTICORE SYSTEM
- Publication number 20230205702
- Publication date Jun 29, 2023
- Fungible, Inc.
- Wael Noureddine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT WORK UNIT PROCESSING IN A MULTICORE SYSTEM
- Publication number 20210349824
- Publication date Nov 11, 2021
- Fungible, Inc.
- Wael Noureddine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT PACKET QUEUEING FOR COMPUTER NETWORKS
- Publication number 20210051116
- Publication date Feb 18, 2021
- Fungible, Inc.
- Paul Kim
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ACCESS NODE FOR DATA CENTERS
- Publication number 20200280462
- Publication date Sep 3, 2020
- Fungible, Inc.
- Pradeep Sindhu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT WORK UNIT PROCESSING IN A MULTICORE SYSTEM
- Publication number 20200151101
- Publication date May 14, 2020
- Fungible, Inc.
- Wael Noureddine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT WORK UNIT PROCESSING IN A MULTICORE SYSTEM
- Publication number 20190243765
- Publication date Aug 8, 2019
- Fungible, Inc.
- Wael Noureddine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCESS NODE FOR DATA CENTERS
- Publication number 20190013965
- Publication date Jan 10, 2019
- Fungible, Inc.
- Pradeep Sindhu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
BUFFER ALLOCATION AND MEMORY MANAGEMENT USING MAPPING TABLE
- Publication number 20180081567
- Publication date Mar 22, 2018
- Fungible Inc.
- Deepak Goel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUITS HAVING EXPANDABLE PROCESSOR MEMORY
- Publication number 20180081696
- Publication date Mar 22, 2018
- Altera Corporation
- Paul Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Buffer Allocation and Memory Management
- Publication number 20180081580
- Publication date Mar 22, 2018
- Fungible Inc.
- Deepak Goel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TWO STAGE BLOOM FILTER FOR LONGEST PREFIX MATCH
- Publication number 20170187624
- Publication date Jun 29, 2017
- Juniper Networks, Inc.
- Deepak Goel
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Network Packet Steering via Configurable Association of Packet Proc...
- Publication number 20140161136
- Publication date Jun 12, 2014
- Cisco Technology, Inc.
- Sachin Desai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
IDENTIFYING UNALLOCATED MEMORY SEGMENTS
- Publication number 20130166859
- Publication date Jun 27, 2013
- Juniper Networks, Inc.
- Robert RHOADES
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
NETWORK PACKET STEERING VIA CONFIGURABLE ASSOCIATION OF PACKET PROC...
- Publication number 20120069850
- Publication date Mar 22, 2012
- FORTINET, INC.
- Sachin Desai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
NETWORK PACKET STEERING VIA CONFIGURABLE ASSOCIATION OF PROCESSING...
- Publication number 20090238181
- Publication date Sep 24, 2009
- FORTINET, INC.
- Sachin Desai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
NETWORK PACKET STEERING VIA CONFIGURABLE ASSOCIATION OF PROCESSING...
- Publication number 20070147368
- Publication date Jun 28, 2007
- FORTINET, INC.
- Sachin Desai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Method for operating low power programmable processor
- Publication number 20060152519
- Publication date Jul 13, 2006
- NVIDIA Corporation
- Edward A. Hutchins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Coincident graphics pixel scoreboard tracking system and method
- Publication number 20060007234
- Publication date Jan 12, 2006
- Edward A. Hutchins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for a universal data write unit in a 3-D graphics...
- Publication number 20050280652
- Publication date Dec 22, 2005
- Edward A. Hutchins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Low power programmable processor
- Publication number 20050253861
- Publication date Nov 17, 2005
- Edward A. Hutchins
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Network packet steering
- Publication number 20030223418
- Publication date Dec 4, 2003
- Sachin Desai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Person

Patents Grantslast 30 patents

Efficient work unit processing in a multicore system

Efficient work unit processing in a multicore system

Efficient packet queueing for computer networks

Access node for data centers

Efficient work unit processing in a multicore system

Access node integrated circuit for data centers which includes a ne...

Scalable ingress arbitration for merging control and payload

Efficient work unit processing in a multicore system

Integrated circuits having expandable processor memory

Efficient traffic management

Buffer allocation and memory management

Buffer allocation and memory management using mapping table

Two stage bloom filter for longest prefix match

Forwarding packets using a probabilistic filter and a grouping tech...

Two stage bloom filter for longest prefix match

Network packet steering via configurable association of packet proc...

Identifying unallocated memory segments

Network packet steering via configurable association of packet proc...

Transmit-buffer management for priority-based flow control

Identifying unallocated memory segments

Network packet steering via configurable association of processing...

Network packet steering via configurable association of processing...

Method for operating low power programmable processor

System and method for pixel data row forwarding in a 3-D graphics p...

System and method for a universal data write unit in a 3-D graphics...

Network packet steering

Low power programmable processor

Patents Applicationslast 30 patents

EFFICIENT WORK UNIT PROCESSING IN A MULTICORE SYSTEM

EFFICIENT WORK UNIT PROCESSING IN A MULTICORE SYSTEM

EFFICIENT PACKET QUEUEING FOR COMPUTER NETWORKS

ACCESS NODE FOR DATA CENTERS

EFFICIENT WORK UNIT PROCESSING IN A MULTICORE SYSTEM

EFFICIENT WORK UNIT PROCESSING IN A MULTICORE SYSTEM

ACCESS NODE FOR DATA CENTERS

BUFFER ALLOCATION AND MEMORY MANAGEMENT USING MAPPING TABLE

INTEGRATED CIRCUITS HAVING EXPANDABLE PROCESSOR MEMORY

Buffer Allocation and Memory Management

TWO STAGE BLOOM FILTER FOR LONGEST PREFIX MATCH

Network Packet Steering via Configurable Association of Packet Proc...

IDENTIFYING UNALLOCATED MEMORY SEGMENTS

NETWORK PACKET STEERING VIA CONFIGURABLE ASSOCIATION OF PACKET PROC...

NETWORK PACKET STEERING VIA CONFIGURABLE ASSOCIATION OF PROCESSING...

NETWORK PACKET STEERING VIA CONFIGURABLE ASSOCIATION OF PROCESSING...

Method for operating low power programmable processor

Coincident graphics pixel scoreboard tracking system and method

System and method for a universal data write unit in a 3-D graphics...

Low power programmable processor

Network packet steering