Paul Marchal

Person

Blanden, BE

People

Patents Grantslast 30 patents

Information Patent Grant
Test circuit for testing through-silicon-vias in 3D integrated circ...
- Patent number 8,773,157
- Issue date Jul 8, 2014
- IMEC
- Mustafa Badaroglu
- G01 - MEASURING TESTING
Information Patent Grant
Method and device for testing TSVS in a 3D chip stack
- Patent number 8,593,170
- Issue date Nov 26, 2013
- IMEC
- Geert Van der Plas
- G01 - MEASURING TESTING
Information Patent Grant
Optimization
- Patent number 8,136,078
- Issue date Mar 13, 2012
- IMEC
- Axel Nackaerts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cost-aware design-time/run-time memory management methods and appar...
- Patent number 7,552,304
- Issue date Jun 23, 2009
- Interuniversitair Microelektronica Centrum (IMEC)
- Paul Marchal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Task concurrency management design method
- Patent number 7,234,126
- Issue date Jun 19, 2007
- Interuniversitair Microelektronica Centrum
- Francky Catthoor
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
FAULT MODE CIRCUITS
- Publication number 20130002272
- Publication date Jan 3, 2013
- IMEC
- Mustafa Badaroglu
- G01 - MEASURING TESTING
Information Patent Application
CAPACITANCE MEASUREMENT IN MICROCHIPS
- Publication number 20120025841
- Publication date Feb 2, 2012
- IMEC
- Jaemin Kim
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND DEVICE FOR TESTING TSVS IN A 3D CHIP STACK
- Publication number 20110102011
- Publication date May 5, 2011
- IMEC
- Geert Van der Plas
- G01 - MEASURING TESTING
Information Patent Application
DESIGN OPTIMIZATION
- Publication number 20090112344
- Publication date Apr 30, 2009
- Interuniversitair Microelektronica Centrum vzw (IMEC)
- Axel Nackaerts
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TASK CONCURRENCY MANAGEMENT DESIGN METHOD
- Publication number 20070245273
- Publication date Oct 18, 2007
- Interuniversitair Microelektronica Centrum
- Francky Catthoor
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable memory interfacing device for use in active memory man...
- Publication number 20060075157
- Publication date Apr 6, 2006
- Paul Marchal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cost-aware design-time/run-time memory management methods and appar...
- Publication number 20060018179
- Publication date Jan 26, 2006
- Paul Marchal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Task concurrency management design method
- Publication number 20020099756
- Publication date Jul 25, 2002
- Francky Catthoor
- G06 - COMPUTING CALCULATING COUNTING

Paul Marchal

Person

Patents Grantslast 30 patents

Test circuit for testing through-silicon-vias in 3D integrated circ...

Method and device for testing TSVS in a 3D chip stack

Optimization

Cost-aware design-time/run-time memory management methods and appar...

Task concurrency management design method

Patents Applicationslast 30 patents

FAULT MODE CIRCUITS

CAPACITANCE MEASUREMENT IN MICROCHIPS

METHOD AND DEVICE FOR TESTING TSVS IN A 3D CHIP STACK

DESIGN OPTIMIZATION

TASK CONCURRENCY MANAGEMENT DESIGN METHOD

Programmable memory interfacing device for use in active memory man...

Cost-aware design-time/run-time memory management methods and appar...

Task concurrency management design method