Paul Wong

Follow

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method to analyze an analog circuit design with a verification program
- Patent number 7,643,979
- Issue date Jan 5, 2010
- Rambus Inc.
- Qiang Hong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-format consistency checking tool
- Patent number 7,392,492
- Issue date Jun 24, 2008
- Rambus Inc.
- Qiang Hong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mixed mode verifier
- Patent number 7,360,187
- Issue date Apr 15, 2008
- Rambus Inc.
- Kevin D. Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scannable state element architecture for digital circuits
- Patent number 6,745,356
- Issue date Jun 1, 2004
- Fujitsu Limited
- Paul Wong
- G01 - MEASURING TESTING
Information Patent Grant
Handling a 1-hot multiplexer during built-in self-testing of logic
- Patent number 6,658,617
- Issue date Dec 2, 2003
- Fujitsu Limited
- Paul Wong
- G01 - MEASURING TESTING
Information Patent Grant
System and method for improving LBIST test coverage
- Patent number 6,636,997
- Issue date Oct 21, 2003
- Fujitsu Limited
- Paul Wong
- G01 - MEASURING TESTING

Patents Applicationslast 30 patents

Information Patent Application
Multi-Format Consistency Checking Tool
- Publication number 20080263487
- Publication date Oct 23, 2008
- Qiang Hong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method to analyze an analog circuit design with a verification program
- Publication number 20070168172
- Publication date Jul 19, 2007
- Qiang Hong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Mixed mode verifier
- Publication number 20070079268
- Publication date Apr 5, 2007
- Kevin D. Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-format consistency checking tool
- Publication number 20070079267
- Publication date Apr 5, 2007
- Qiang Hong
- G06 - COMPUTING CALCULATING COUNTING