Paulo Luis Dutra

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for generating data bus interface circuitry
- Patent number 8,359,557
- Issue date Jan 22, 2013
- Xilinx, Inc.
- Xi Chen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Simulation of a programming language specification of a circuit design
- Patent number 7,437,701
- Issue date Oct 14, 2008
- Xilinx, Inc.
- Paulo Luis Dutra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and circuit for decoding an address of an address space
- Patent number 7,426,583
- Issue date Sep 16, 2008
- Xilinx, Inc.
- Paulo L. Dutra
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Verification environment creation infrastructure for bus-based syst...
- Patent number 7,315,803
- Issue date Jan 1, 2008
- Xilinx, Inc.
- Jorge Ernesto Carrillo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating fast logic simulation models for a PLD design description
- Patent number 7,131,091
- Issue date Oct 31, 2006
- Xilinx, Inc.
- Satish R. Ganesan
- G06 - COMPUTING CALCULATING COUNTING