Pavel Aleksandrovich Aliseychik

Person

Moscow, RU

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for increasing frame rate of an image stream u...
- Patent number 9,386,266
- Issue date Jul 5, 2016
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Denis V. Parkhomenko
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Image processor with edge selection functionality
- Patent number 9,373,053
- Issue date Jun 21, 2016
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Denis V. Parfenov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Image processor with evaluation layer implementing software and har...
- Patent number 9,323,995
- Issue date Apr 26, 2016
- Avago Technologies General IP (Sinagpore) Pte. Ltd.
- Pavel A. Aliseychik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Trapping-set database for a low-density parity-check decoder
- Patent number 9,124,297
- Issue date Sep 1, 2015
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Pavel Aleksandrovich Aliseychik
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Program module applicability analyzer for software development and...
- Patent number 9,043,770
- Issue date May 26, 2015
- LSI Corporation
- Pavel Aleksandrovich Aliseychik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable circuit for high speed computation of the interleaver...
- Patent number 8,938,654
- Issue date Jan 20, 2015
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Andrey P. Sokolov
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Packet router having a hierarchical buffer structure
- Patent number 8,923,315
- Issue date Dec 30, 2014
- LSI Corporation
- Pavel Aleksandrovich Aliseychik
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Two-pass linear complexity task scheduler
- Patent number 8,850,437
- Issue date Sep 30, 2014
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Yurii S. Shutkin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast echo gain change detection
- Patent number 8,817,970
- Issue date Aug 26, 2014
- LSI Corporation
- Alexander A. Petyushko
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Video transcoder with flexible quality and complexity management
- Patent number 8,731,068
- Issue date May 20, 2014
- LSI Corporation
- Denis Vassilevich Parfenov
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Accelerator for a read-channel design and simulation tool
- Patent number 8,713,495
- Issue date Apr 29, 2014
- LSI Corporation
- Pavel Aleksandrovich Aliseychik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel true random number generator architecture
- Patent number 8,539,009
- Issue date Sep 17, 2013
- LSI Corporation
- Pavel A. Aliseychik
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
System and method for using the universal multipole for the impleme...
- Patent number 8,527,851
- Issue date Sep 3, 2013
- LSI Corporation
- Alexander E. Andreev
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
BCH or reed-solomon decoder with syndrome modification
- Patent number 8,397,143
- Issue date Mar 12, 2013
- LSI Corporation
- Ilya V. Neznanov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Soft reed-solomon decoder based on error-and-erasure reed-solomon d...
- Patent number 8,365,054
- Issue date Jan 29, 2013
- LSI Corporation
- Elyar E. Gasanov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Scheme for erasure locator polynomial calculation in error-and-eras...
- Patent number 8,286,060
- Issue date Oct 9, 2012
- LSI Corporation
- Pavel A. Panteleev
- H03 - BASIC ELECTRONIC CIRCUITRY

Patents Applicationslast 30 patents

Information Patent Application
IMAGE PROCESSOR WITH EVALUATION LAYER IMPLEMENTING SOFTWARE AND HAR...
- Publication number 20160004919
- Publication date Jan 7, 2016
- LSI Corporation
- Pavel A. Aliseychik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMAGE PROCESSOR WITH EDGE SELECTION FUNCTIONALITY
- Publication number 20150220804
- Publication date Aug 6, 2015
- LSI Corporation
- Denis V. Parfenov
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GESTURE RECOGNITION SYSTEM WITH FINITE STATE MACHINE CONTROL OF CUR...
- Publication number 20150220153
- Publication date Aug 6, 2015
- LSI Corporation
- Pavel A. Aliseychik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMAGE PROCESSOR COMPRISING GESTURE RECOGNITION SYSTEM WITH COMPUTAT...
- Publication number 20150161437
- Publication date Jun 11, 2015
- Ivan L. Mazurenko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GESTURE RECOGNITION METHOD AND APPARATUS UTILIZING ASYNCHRONOUS MUL...
- Publication number 20150146920
- Publication date May 28, 2015
- LSI Corporation
- Ivan L. Mazurenko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMAGE PROCESSOR WITH STATIC POSE RECOGNITION MODULE UTILIZING SEGME...
- Publication number 20150139487
- Publication date May 21, 2015
- LSI Corporation
- Pavel A. Aliseychik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DEPTH IMAGE COMPRESSION AND DECOMPRESSION UTILIZING DEPTH AND AMPLI...
- Publication number 20150043807
- Publication date Feb 12, 2015
- LSI Corporation
- Pavel A. Aliseychik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
IMAGE PROCESSOR CONFIGURED FOR EFFICIENT ESTIMATION AND ELIMINATION...
- Publication number 20150030232
- Publication date Jan 29, 2015
- LSI Corporation
- Denis V. Parkhomenko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR INCREASING FRAME RATE OF AN IMAGE STREAM U...
- Publication number 20140362289
- Publication date Dec 11, 2014
- LSI Corporation
- Denis V. Parkhomenko
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EVALUATION OF PERFORMANCE CHARACTERISTICS OF A READ CHANNEL
- Publication number 20140129898
- Publication date May 8, 2014
- Aleksey Alexandrovich Letunovskiy
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TRAPPING-SET DATABASE FOR A LOW-DENSITY PARITY-CHECK DECODER
- Publication number 20140122960
- Publication date May 1, 2014
- Pavel Aleksandrovich Aliseychik
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
READ-CHANNEL DESIGN AND SIMULATION TOOL HAVING A CODEWORD-CLASSIFIC...
- Publication number 20140075400
- Publication date Mar 13, 2014
- LSI Corporation
- Pavel Aleksandrovich Aliseychik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATOR FOR A READ-CHANNEL DESIGN AND SIMULATION TOOL
- Publication number 20140053121
- Publication date Feb 20, 2014
- LSI Corporation
- Pavel Aleksandrovich Aliseychik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PACKET ROUTER HAVING A HIERARCHICAL BUFFER STRUCTURE
- Publication number 20140023085
- Publication date Jan 23, 2014
- LSI Corporation
- Pavel Aleksandrovich Aliseychik
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ACCELERATING ERROR-CORRECTION DECODER SIMULATIONS WITH THE ADDITION...
- Publication number 20140019825
- Publication date Jan 16, 2014
- LSI Corporation
- Pavel Aleksandrovich Aliseychik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Source Code Generator for Software Development and Testing for Mult...
- Publication number 20140007044
- Publication date Jan 2, 2014
- LSI Corporation
- Pavel Aleksandrovich Aliseychik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Source Code Level Multistage Scheduling Approach for Software Devel...
- Publication number 20140006751
- Publication date Jan 2, 2014
- LSI Corporation
- Pavel Aleksandrovich Aliseychik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Program Module Applicability Analyzer for Software Development and...
- Publication number 20140007043
- Publication date Jan 2, 2014
- LSI Corporation
- Pavel Aleksandrovich Aliseychik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTRA-MODE SEARCH FOR VIDEO ENCODING
- Publication number 20130028317
- Publication date Jan 31, 2013
- LSI Corporation
- Denis Vassilevich Parfenov
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
FAST ECHO GAIN CHANGE DETECTION
- Publication number 20120288084
- Publication date Nov 15, 2012
- Alexander A. Petyushko
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TWO-PASS LINEAR COMPLEXITY TASK SCHEDULER
- Publication number 20120284731
- Publication date Nov 8, 2012
- Yurii S. Shutkin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MUSIC DETECTION BASED ON PAUSE ANALYSIS
- Publication number 20120155655
- Publication date Jun 21, 2012
- LSI Corporation
- Denis Vladimirovich Parkhomenko
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MIXED-MODE RESIZING FOR A VIDEO TRANSCODER
- Publication number 20120051427
- Publication date Mar 1, 2012
- LSI Corporation
- Denis Vassilevich Parfenov
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
VIDEO TRANSCODER WITH FLEXIBLE QUALITY AND COMPLEXITY MANAGEMENT
- Publication number 20120051440
- Publication date Mar 1, 2012
- LSI Corporation
- Denis Vassilevich Parfenov
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
PROGRAMMABLE CIRCUIT FOR HIGH SPEED COMPUTATION OF THE INTERLEAVER...
- Publication number 20110239079
- Publication date Sep 29, 2011
- Andrey P. Sokolov
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
BCH OR REED-SOLOMON DECODER WITH SYNDROME MODIFICATION
- Publication number 20100299580
- Publication date Nov 25, 2010
- Ilya V. Neznanov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SOFT REED-SOLOMON DECODER BASED ON ERROR-AND-ERASURE REED-SOLOMON D...
- Publication number 20100281344
- Publication date Nov 4, 2010
- Elyar E. Gasanov
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PARALLEL TRUE RANDOM NUMBER GENERATOR ARCHITECTURE
- Publication number 20100153478
- Publication date Jun 17, 2010
- Pavel A. Aliseychik
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for using the universal multipole for the impleme...
- Publication number 20100031126
- Publication date Feb 4, 2010
- Alexander E. Andreev
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
SCHEME FOR ERASURE LOCATOR POLYNOMIAL CALCULATION IN ERROR-AND-ERAS...
- Publication number 20100031127
- Publication date Feb 4, 2010
- Pavel A. Panteleev
- H03 - BASIC ELECTRONIC CIRCUITRY

Pavel Aleksandrovich Aliseychik

Person

Patents Grantslast 30 patents

Method and apparatus for increasing frame rate of an image stream u...

Image processor with edge selection functionality

Image processor with evaluation layer implementing software and har...

Trapping-set database for a low-density parity-check decoder

Program module applicability analyzer for software development and...

Programmable circuit for high speed computation of the interleaver...

Packet router having a hierarchical buffer structure

Two-pass linear complexity task scheduler

Fast echo gain change detection

Video transcoder with flexible quality and complexity management

Accelerator for a read-channel design and simulation tool

Parallel true random number generator architecture

System and method for using the universal multipole for the impleme...

BCH or reed-solomon decoder with syndrome modification

Soft reed-solomon decoder based on error-and-erasure reed-solomon d...

Scheme for erasure locator polynomial calculation in error-and-eras...

Patents Applicationslast 30 patents

IMAGE PROCESSOR WITH EVALUATION LAYER IMPLEMENTING SOFTWARE AND HAR...

IMAGE PROCESSOR WITH EDGE SELECTION FUNCTIONALITY

GESTURE RECOGNITION SYSTEM WITH FINITE STATE MACHINE CONTROL OF CUR...

IMAGE PROCESSOR COMPRISING GESTURE RECOGNITION SYSTEM WITH COMPUTAT...

GESTURE RECOGNITION METHOD AND APPARATUS UTILIZING ASYNCHRONOUS MUL...

IMAGE PROCESSOR WITH STATIC POSE RECOGNITION MODULE UTILIZING SEGME...

DEPTH IMAGE COMPRESSION AND DECOMPRESSION UTILIZING DEPTH AND AMPLI...

IMAGE PROCESSOR CONFIGURED FOR EFFICIENT ESTIMATION AND ELIMINATION...

METHOD AND APPARATUS FOR INCREASING FRAME RATE OF AN IMAGE STREAM U...

EVALUATION OF PERFORMANCE CHARACTERISTICS OF A READ CHANNEL

TRAPPING-SET DATABASE FOR A LOW-DENSITY PARITY-CHECK DECODER

READ-CHANNEL DESIGN AND SIMULATION TOOL HAVING A CODEWORD-CLASSIFIC...

ACCELERATOR FOR A READ-CHANNEL DESIGN AND SIMULATION TOOL

PACKET ROUTER HAVING A HIERARCHICAL BUFFER STRUCTURE

ACCELERATING ERROR-CORRECTION DECODER SIMULATIONS WITH THE ADDITION...

Source Code Generator for Software Development and Testing for Mult...

Source Code Level Multistage Scheduling Approach for Software Devel...

Program Module Applicability Analyzer for Software Development and...

INTRA-MODE SEARCH FOR VIDEO ENCODING

FAST ECHO GAIN CHANGE DETECTION

TWO-PASS LINEAR COMPLEXITY TASK SCHEDULER

MUSIC DETECTION BASED ON PAUSE ANALYSIS

MIXED-MODE RESIZING FOR A VIDEO TRANSCODER

VIDEO TRANSCODER WITH FLEXIBLE QUALITY AND COMPLEXITY MANAGEMENT

PROGRAMMABLE CIRCUIT FOR HIGH SPEED COMPUTATION OF THE INTERLEAVER...

BCH OR REED-SOLOMON DECODER WITH SYNDROME MODIFICATION

SOFT REED-SOLOMON DECODER BASED ON ERROR-AND-ERASURE REED-SOLOMON D...

PARALLEL TRUE RANDOM NUMBER GENERATOR ARCHITECTURE

System and method for using the universal multipole for the impleme...

SCHEME FOR ERASURE LOCATOR POLYNOMIAL CALCULATION IN ERROR-AND-ERAS...